Nishi Family › Compare › LLM Inference and Serving
Nishi Compare · full-field SOTA · measured, not asserted
LLM Inference and Serving
Nishi vs the full field — every axis measured or researcher-sourced, grouped by category; each strip shows the whole field at a glance.
12 engines, 42 axes, 7 categories. Competitor cells sourced from each project's own docs (researcher-banked 2026-07-09); Nishi cells measured by our gates. Frontier ladder: /compare/llm/frontier
Speed and scale (quantitative)
Nishi REMEASURED 2026-07-17 (F-004, Qwen2.5-0.5B i8, 16T healthy 17-thread build): decode ~15 tok/s bench / 23 warm -- the prior 2.40 was PREFILL mislabeled as decode; vs cited llama.cpp 20-60 = ~1-4x behind on decode (prefill ~9 tok/s remains the wall)
vLLM n/a GPU-firstSGLang n/a GPU-firstTensorRT-LLM n/a GPU-onlyllama.cpp ~20-60LMDeploy n/a GPU-firstTGI n/a CPU subparMLC-LLM ~10-30Ollama ~20-60ExLlamaV2 n/a GPU-onlyCTranslate2 ~10-40 int8DeepSpeed-MII n/a GPU-firstAphrodite n/a GPU-first
from each project README/model table (LMDeploy lists Intern-S1-Pro 1TB); Nishi = Qwen2.5-0.5B end-to-end proven
vLLM 670B+ DeepSeek-V3SGLang 670B+ (96xH100 EP)TensorRT-LLM 670B+ Blackwellllama.cpp 670B GGUFLMDeploy 1TB Intern-S1-ProTGI 180B FalconMLC-LLM 70B-classOllama 670B libraryExLlamaV2 120B-class multi-GPUCTranslate2 20B-class enc-decDeepSpeed-MII 530B MT-NLGAphrodite 670B+ vLLM-parity
counts from each README quant list; Nishi = Q4_K/Q5_0/Q6_K/Q8_0 read + in-memory Q8_0 repack (measured arc) [gptq2022] [awq2023]
vLLM 10+ (FP8 MXFP4 NVFP4 INT8/4 GPTQ AWQ GGUF...)SGLang 5+ (FP4 FP8 INT4 AWQ GPTQ)TensorRT-LLM 6+ (FP8 FP4 INT4 AWQ)llama.cpp 25+ (1.5- to 8-bit GGUF)LMDeploy 6+ (AWQ GPTQ W4A16 MXFP4 KV int8/4)TGI 7 (bnb GPTQ EETQ AWQ Marlin fp8 NF4)MLC-LLM 3-4 group-quantOllama GGUF setExLlamaV2 EXL2 2-8 bpwCTranslate2 3 (INT8 INT16 AWQ)DeepSpeed-MII 2-3Aphrodite 10+ vLLM-derived
vLLM README claims 200+ [vllm-docs]; LMDeploy README model table; Nishi loads Qwen2-class GGUF plus its own trained nofloat transformer
vLLM 200+SGLang wide (LLM embed reward diffusion)TensorRT-LLM 50+llama.cpp 150+ GGUFLMDeploy 60+ LLM + 40+ VLMTGI 20+ optimizedMLC-LLM 40+Ollama 100s libraryExLlamaV2 Llama-family+CTranslate2 20+ (enc-dec incl Whisper)DeepSpeed-MII 20+Aphrodite vLLM-parity
backend lists from each README; llama.cpp is the portability king of the natives, MLC of browser/mobile
vLLM 10+ (NV AMD x86 ARM PPC TPU Gaudi Ascend Apple...)SGLang 6+ (NV AMD Xeon TPU Ascend)TensorRT-LLM 1 vendor (NVIDIA all gens)llama.cpp 10+ (CPU CUDA Metal Vulkan HIP SYCL MUSA CANN OpenCL RPC)LMDeploy 3 (NV V100+ Ascend Jetson)TGI 6 (NV AMD Inferentia Intel Gaudi TPU)MLC-LLM 8+ (CUDA ROCm Vulkan Metal WebGPU iOS Android)Ollama 4 (Mac Win Linux; NV AMD)ExLlamaV2 2 (NVIDIA ROCm)CTranslate2 2 (x86 CPU NVIDIA)DeepSpeed-MII 1-2 (NVIDIA)Aphrodite 4+ (NV AMD CPU Win)
self-reported README claims (SGLang: 400k GPUs; TGI: CAUTION maintenance mode)
vLLM 2000+ contributors, industry standardSGLang 400k+ GPUs, trillions tok/dayTensorRT-LLM NVIDIA enterprise stackllama.cpp ubiquitous local standardLMDeploy InternLM productionTGI HF prod, now maintenance modeMLC-LLM browser+mobile nicheOllama dominant local runnerExLlamaV2 enthusiast standardCTranslate2 prod MT/Whisper stacksDeepSpeed-MII dormant since ~2024Aphrodite community serving (Kobold lineage)
KV cache and memory
vLLM invented PagedAttention (SOSP 2023) [kwon2023]; Nishi nx_kvcache BUILT + gate GREEN (paged==contiguous bit-exact, fork+COW) but not yet wired into serving; ExLlamaV2 paged via flash-attn; llama.cpp unified cache
SGLang zero-overhead scheduler + vLLM set the bar; LMDeploy persistent batch; MII Dynamic SplitFuse; CT2 dynamic offline batching; Nishi serves one request at a time (top gap)
SGLang RadixAttention (5x claim, banked blog list); TRT-LLM KV Cache Reuse; LMDeploy automatic prefix caching; llama.cpp prompt cache
Nishi WIRED + measured 2026-07-09 (one m=n forward, ~17x fewer prefill passes, TTFT collapse); LMDeploy dynamic split-and-fuse; MII SplitFuse
ExLlamaV2 Q4 cache pioneer (README); LMDeploy online int8/int4 KV (README); llama.cpp q8/q4 KV flags
Speed techniques
Marlin-class W4A16 is the SOTA bar [marlin2024]; Nishi CPU-Marlin: __f32_i8dot32 SSE intrinsic blessed, Q8_0 path 10.2x measured, Q5/Q4 unpack proven compute-bound on CPU (honest partial)
SGLang DFlash/Spec-V2 (2026-06 blog = current frontier); TGI claims ~2x; Nishi BUILT prompt-lookup + bit-identical gate, 58 pct accept, wall 0.94x = no net win yet (honest)
TRT engine compilation [trtllm] and MLC whole-model TVM compilation are the two compilation identities; vLLM CUDA graphs + torch.compile; Nishi is AOT-native by construction but has no GPU graphs
vLLM README lists FlashAttention FlashInfer TRTLLM-GEN FlashMLA Triton; LMDeploy FlashMLA; Nishi has own GQA offset-causal attention [vaswani2017], scalar+SSE, no flash-class tiling
Parallelism and distribution
TGI NCCL TP (README); CTranslate2 tensor parallelism (README); llama.cpp row/layer split
vLLM/SGLang/TRT READMEs; llama.cpp RPC layer split
SGLang large-scale EP (96xH100 + GB200 blogs) leads; LMDeploy DeepEP/eplb (README); Nishi has no MoE (remaining census opportunity)
SGLang GB200 P/D blogs (3.8x prefill 4.8x decode); LMDeploy via DLSlime+Mooncake (README); TRT via Dynamo
llama.cpp RPC; LMDeploy proxy server multi-machine (README); MII replicas + load balancing (README)
Nishi MEASURED 7.34x q4k matmul on 8T + 16T decode (sovereign pool, no pthread); llama.cpp AVX/AMX/NUMA is the CPU king; CT2 MKL/oneDNN/Ruy
Model I/O and sampling
llama.cpp owns the format [llamacpp]; Nishi nx_gguf loader + tensor-type census (Q4_K/Q5_0/Q6_K/Q8_0/F32) measured; Ollama/Aphrodite GGUF native
Nishi sovereign BPE verified == Qwen2 digit-split behavior (nx_tok_probe); llama.cpp own tokenizer; the rest ship HF tokenizers
llama.cpp deepest (min-p mirostat DRY XTC ecosystem); TGI logits warpers (README); Nishi greedy + temperature + top-k measured, no top-p/penalties yet
SGLang compressed-FSM 3x JSON decoding (banked blog list); llama.cpp GBNF grammars; vLLM xgrammar/guidance (README); Ollama JSON schema
vLLM tool calling + reasoning parsers (README); LMDeploy TOOLS CALLING (README); Ollama tool calling (README)
LMDeploy VLM table is the largest (InternVL home, README); llama.cpp multimodal; Ollama vision models
llama.cpp embedding + rerank (README); SGLang e5/gte/reward (README); Nishi sovereign SGNS embeddings power live in-corpus search but expose no embed-API endpoint
Nishi sovereign autograd + stable Q16 integer training recipe (trained real models: reader, neural image codec); SGLang = RL rollout backend for external trainers; the field is inference-only
Serving and API
universal in the field (each README); Nishi serve organ is bespoke HTTP + MCP-first plane instead - an honest drop-in-adoption gap
vLLM README explicitly ships Anthropic Messages API alongside OpenAI + gRPC
TGI Rust gRPC core (README); MII gRPC (README); TRT via Triton
Nishi live sovereign MCP plane (compare/status/search tools served to agents today); absent from every banked engine README
TGI SSE (README); Ollama stream (README); Nishi serve returns full completions (gap)
TGI Prometheus + OpenTelemetry distributed tracing (README) = the production bar; Nishi has logs only
Ollama one-command install is the consumer bar (README) [ollama]; Nishi = sovereign ELF drop, zero deps, but self-hosted only
Sovereignty and determinism (Nishi lane)
Nishi: own language + compiler to x86 ELF, own HTTP/TLS, no libc/BLAS/PyTorch/CUDA; llama.cpp minimal C/C++ but on OS toolchain; the rest sit on PyTorch/CUDA/HF. EVIDENCE (MEASURED 2026-08-13, and this cell carried none until 2026-08-14): a return-42 static ELF out of this toolchain is 188 bytes with --no-crash-guard and 5,105 bytes with the default crash guard. A binary of that size cannot contain a libc -- which states the claim as a number somebody can re-measure instead of as an adjective
Nishi gates prove bit-identical decode (spec==plain, paged==contiguous, cross-run); batched GPU float engines are nondeterministic by construction; llama.cpp reproducible only single-config
Nishi integer-only Q16 training (grad-clip + LR-decay recipe, measured) - no engine in the field claims this
Nishi: every line from compiler to syscall is in-house readable; llama.cpp compact C++ auditable but sits on drivers/CUDA beneath. EVIDENCE (this cell carried none until 2026-08-14): the chain is nx_cc -> nxasm -> ELF with no LLVM, GCC or libc beneath, and it compiles on the NAS over the mgmt API (build-over-API GREEN 2026-07-06). The compiler SELF-HOSTS, and nx_cc_equiv_gate -- a differential build-and-stdout-equality gate plus a self-host stage -- runs 10/10 GREEN before any toolchain promotion, so auditable-in-house is backed by a gate that rebuilds the reader itself rather than by an assertion about readability
DOWNGRADED Best -> Yes 2026-08-14, and the reason was sitting in this row's own note: it already said llama.cpp and Ollama are fully local. Four rivals hold Yes on this axis, so claiming Best over them was an overclaim that the evidence-counted liar-kill correctly refused to publish. Nishi never phones home by construction and that is a real property -- it is simply not a lead here. The honest fix for an unevidenced Best is sometimes to lower the grade rather than to go looking for a citation that would justify keeping it
from banked READMEs: TGI = CAUTION maintenance mode recommending vLLM/SGLang; MII dormant; vLLM/SGLang/llama.cpp are the active frontier
Person · product · place — not yet measured for this domain
knowledge/compare/llm.ppp (rows surface|nishi or c1..c4|label|url|connect naming OUR live surface and each rival's front door), run nx_ppp_probe domain llm, and this section fills itself on the next beat: the same ruler on both sides — privacy and CX (third-party hosts, tracker classes, cookies, security headers), design and longevity (design hygiene, computed WCAG contrast, render-blocking resources, unsized media, script weight, theme and motion queries), findability (landmarks, skip link, on-site search, breadcrumb, headings, internal links).References
- [llamacpp] ggml-org. llama.cpp: LLM inference in C/C++ (project README, GitHub). Accessed August 2026. publisher · read in our library
knowledge/fetched/cmp_llm_llamacpp.html· pinh8f4ccd064eee25e9c5294a49af67e94126cf3c7c21070677fc7c0eb55eb8a1a0· accessed 2026-08-18 · vendor-docGrounds: The llama.cpp column codes: the GGUF home (Open-weights GGUF loading row, Best), K-quant CPU int4 kernels (Int4 quantized inference, Best), hand-tuned CPU/SIMD plus CUDA Metal Vulkan HIP SYCL backends (SIMD-tuned CPU kernels Best; llm.sota Hardware targets 10+ and CPU multithread scaling Best), GBNF grammars and the deepest sampling suite in llm.sota. - [vllm-docs] vLLM project. vLLM documentation: easy, fast, and cheap LLM serving for everyone -- PagedAttention, continuous batching, OpenAI-compatible server, quantization support (docs.vllm.ai, latest). Accessed August 2026. publisher · read in our library
knowledge/fetched/cmp_llm_vllm-docs.html· pinhcb6c8aac74d457992a5eebb7eb4100ccc89ea95c565955674f5121b9656d32bb· accessed 2026-08-18 · vendor-docGrounds: The vLLM column: Served chat API (OpenAI-shaped) Best, Continuous batching throughput Best, KV-cache / paged attention Best, and the llm.sota Weight-quant formats (10+), Model architectures (200+), OpenAI-compatible API and Anthropic Messages API cells -- the docs are where those counts and features are stated. - [ollama] Ollama. Get up and running with large language models (project README, GitHub). Accessed August 2026. publisher · read in our library
knowledge/fetched/cmp_llm_ollama.html· pinhe69552ff3d50c1c01461902d181ab39a4edb65b37e09fbcc74a8b2dba12e3a29· accessed 2026-08-18 · vendor-docGrounds: The Ollama column: llm.sota Turnkey local install Best (one-command install is the consumer bar), GGUF-native local runner, JSON-schema structured output and tool calling cells, and the local-runner decode class the Competitive CPU speed row is set beside. - [trtllm] NVIDIA. TensorRT-LLM: an open-source library for optimizing large language model inference on NVIDIA GPUs (project README, GitHub). Accessed August 2026. publisher · read in our library
knowledge/fetched/cmp_llm_trtllm.html· pinhad275cd77ef2d37ab454d140cef77014cbcb0364929f55326b8dda2e3e04eef7· accessed 2026-08-18 · vendor-docGrounds: The TensorRT-LLM column: GPU acceleration Best (NVIDIA-optimal), llm.sota Compiled / graph execution Best (engine compilation), KV Cache Reuse, FP8 FP4 INT4 AWQ quant formats -- and the GPU-only cells that read No or n/a on the CPU rows (SIMD-tuned CPU kernels, single-stream CPU decode). - [kwon2023] Kwon, Li, Zhuang, Sheng, Zheng, Yu, Gonzalez, Zhang, Stoica. Efficient Memory Management for Large Language Model Serving with PagedAttention. SOSP 2023. arXiv:2309.06180. publisher · read in our library
knowledge/fetched/cmp_llm_kwon2023.html· pinhde9353854db4e16af0c63f73502f7e463f03bdc4f3c98f3fcd377fe1c625ed08· accessed 2026-08-18 · published-paperGrounds: The KV-cache / paged attention row (vLLM invented PagedAttention; Nishi re-computes) and the llm.sota Paged / blocked KV cache cell: this paper defines the paged-KV bar that nx_kvcache is gated paged==contiguous bit-exact against, and the continuous-batching serving model the Continuous batching throughput row cites as vLLM-led. - [vaswani2017] Vaswani, Shazeer, Parmar, Uszkoreit, Jones, Gomez, Kaiser, Polosukhin. Attention Is All You Need. NeurIPS 2017. arXiv:1706.03762. publisher · read in our library
knowledge/fetched/cmp_llm_vaswani2017.html· pinh29e42a996471db9c019f1122825cdac0e6d64c96767d9ee5c0b8891de6204bee· accessed 2026-08-18 · published-paperGrounds: The Transformer forward pass, Attention kernels and LayerNorm / normalization rows: the scaled dot-product and multi-head attention that nx_nofloat_llm and nx_attention implement integer-exact -- the core every engine in the column set has, and the reference the no-float forward greedy-matches 4-for-4. - [gptq2022] Frantar, Ashkboos, Hoefler, Alistarh. GPTQ: Accurate Post-Training Quantization for Generative Pre-trained Transformers. ICLR 2023. arXiv:2210.17323. publisher · read in our library
knowledge/fetched/cmp_llm_gptq2022.html· pinhd840ca42e5f79a247194d888c7578ef49224097051f6dace49fdad8378defd26· accessed 2026-08-18 · published-paperGrounds: The llm.sota Weight-quant formats row: GPTQ is one of the named 4-bit post-training weight formats that vLLM, LMDeploy, TGI and Aphrodite serve -- the int4 accuracy bar our GGUF K-quant reads and in-memory Q8_0 repack are counted beside. - [awq2023] Lin, Tang, Tang, Yang, Chen, Wang, Xiao, Dang, Gan, Han. AWQ: Activation-aware Weight Quantization for LLM Compression and Acceleration. MLSys 2024. arXiv:2306.00978. publisher · read in our library
knowledge/fetched/cmp_llm_awq2023.html· pinh9498fecaa8aa13cdbbdd7b3b1098137c0efaf57efb7d2b47115233fafed8e756· accessed 2026-08-18 · published-paperGrounds: The llm.sota Weight-quant formats row: AWQ is the second named 4-bit weight format (vLLM, SGLang, TensorRT-LLM, LMDeploy, TGI) and its activation-aware scaling is the on-device int4 kernel bar the Int4 quantized inference row and our CPU int4 lane are graded against. - [marlin2024] Frantar, Castro, Chen, Hoefler, Alistarh. MARLIN: Mixed-Precision Auto-Regressive Parallel Inference on Large Language Models. arXiv:2408.11743, August 2024. publisher · read in our library
knowledge/fetched/cmp_llm_marlin2024.html· pinh96d7bedab4af9730d3cbfe35f48aa88306ae87eae712c925860563506182bb74· accessed 2026-08-18 · published-paperGrounds: The Marlin-class fused dequant GEMM row (the named Nishi next rung; F32 re-dequant is the measured wall) and the llm.sota Fused quantized-read GEMM cell: Marlin-class W4A16 is the SOTA bar, and the CPU-Marlin Q8_0 path (10.2x measured) is graded against this kernel's fused dequant-and-multiply design.
Generated by nx_swcompare_sota from knowledge/compare/llm.sota — quantitative axes measured/sourced; researcher-fed (nx_swcompare_research). Zero JS, zero trackers.
Where we are. The sovereign inference stack runs real open weights bits-up: integer no-float forward pass, attention, layernorm, own BPE, GGUF loading of Qwen2.5-0.5B, Q4-K dot kernels, AVX2 integer GEMM, an OpenAI-shaped served chat API, and a tensor autograd substrate the inference-only peers lack; two exceeds -- the whole stack is ours with zero PyTorch CUDA or BLAS beneath, and inference is bit-exact by construction. Measured honestly behind llama.cpp on decode (about 15 tok/s vs a cited 20-60) with prefill at about 9 tok/s the remaining wall; absent: KV cache, continuous batching, speculative decoding, MoE, long context, a fused dequant GEMM, GPU offload.
Where we need to go. Serve at llama.cpp-class CPU speed with the determinism they cannot offer: batched prefill first (the measured wall), a KV cache so decode stops recomputing, a fused dequant GEMM (the named next rung), continuous batching across requests, then speculative decoding, long context and MoE -- and the GPU as a delivery cable behind the same bit-exact contract.
Research bar. llama.cpp is measured on CPU int4 K-quants, KV cache, speculative decoding, 20-60 tok/s at 0.5B. Theirs: the CPU reference. Ours: LM1-LM4 LM6 measured on this page.
Research bar. vLLM is measured on PagedAttention, continuous batching. Theirs: the serving reference. Ours: LM3 LM5.
Research bar. Marlin (arXiv 2408.11743) is measured on fused dequant GEMM for quantized weights. Theirs: the kernel reference. Ours: LM4.
| Rung | Closes with | Definition of done (pre-declared) | Executor | Est. |
|---|---|---|---|---|
| Integer forward pass (LL0) | qmul | No-float transformer forward -- LANDED | Organ | 0 u |
| Q4-K dot kernels (LL1) after LL0 | nx_q4k_dot_row_col | Bit-exact quantized dot, 50.4 G mult/s dequant-dot -- LANDED | Organ | 0 u |
| AVX2 integer GEMM (LL2) after LL0 | i32x8_hsum | 7x pooled -- LANDED | Organ | 0 u |
| Served chat API (LL3) after LL0 | ls_extract_prompt | Sovereign seat on :11434 serving real Qwen -- LANDED | Organ | 0 u |
| Batched prefill (LM1) after LL2 | nsv_prefill_batch | Prefill as ONE batched GEMM over the prompt instead of m looped m=1 matmuls; pass-fail tooth: per-token prefill cost FALLS with prompt length on nx_embed_bench at m=8,32,64,125 -- flat means we did not enter the batched regime and must not claim it | Organ | 1.5 u |
| Speed bench on the beat (LM2) after LL3 | csb_decode_bar | An organ that measures decode and prefill tok/s at 0.5B on the beat and publishes them beside the declared bar (20 tok/s decode) with thread count and model sha; gate proves the numbers parse back from its log and a stale measurement abstains | Organ | 1 u |
| KV cache (LM3) after LL0 | kv_paged_attn | Cached K and V per layer with paged blocks so decode attends over the cache instead of recomputing; gate proves token-for-token bit-identical output against the uncached path and a per-token time that stops growing with position | Organ | 2 u |
| Fused dequant GEMM (LM4) after LL1,LL2 | mq_fused_dequant_gemm | A Marlin-class kernel reading quantized weights and accumulating in integer without the F32 re-dequant (the measured wall); gate proves bit-identical results to LL1 and a measured speedup on the same bench | Organ | 2 u |
| Continuous batching (LM5) after LM3 | bs_continuous_batch | Requests join and leave a running batch between steps in the serve loop; gate proves two concurrent requests complete with outputs identical to their solo runs and aggregate tok/s above a single stream | Organ | 2.5 u |
| Speculative decoding (LM6) after LM3,LM1 | sd_draft_verify | A draft pass proposes k tokens the target verifies in one batched step, accepting the longest matching prefix; gate proves output identical to plain decode and acceptance rate published | Organ | 2 u |
| Long context (LM7) after LM3 | lctx_rope_scale | RoPE scaling with the KV cache to 100K-class windows under a declared memory budget; gate proves a needle-in-haystack fixture at the declared length is retrieved and the memory stays inside budget | Organ | 2 u |
| Mixture of experts (LM8) after LL0 | moe_route_experts | Top-k expert routing in the forward pass over an MoE GGUF; gate proves a reference MoE layer matches the float reference greedy-for-greedy as the dense path already does | Organ | 3 u |
| GPU offload (LM9) after LM4 | gpul_offload_layer | Per-layer offload through the estate's GPU delivery cable with the bit-exact contract kept (integer kernels on device); gate proves an offloaded layer produces bit-identical activations to CPU | Organ | 2 u |
Milestones
| Milestone | Rungs | Cumulative |
|---|---|---|
| M1 · The prefill wall | LM1,LM2 | 2.5 u |
| M2 · llama.cpp-class decode | LM3,LM4 | 6.5 u |
| M3 · A serving stack and beyond | LM5,LM6,LM7,LM8,LM9 | 18 u |
Risk register
| Risk | Likelihood x impact | Mitigation |
|---|---|---|
| A throughput claim taken on a loaded box is noise with a decimal point | certain x medium | LM2 records load and thread count with every number and the gate abstains above a declared load. |
| Any kernel change that drifts a single bit destroys the determinism exceed | possible x high | Every LM rung's done-rule is bit-identity against the incumbent path before speed is even read. |
Watch contracts (measured)
| Axis | Organ | Symbol | Status | Note |
|---|---|---|---|---|
| Transformer forward pass | runtime/nx_nofloat_llm.nx | qmul | PRESENT decl | Integer no-float forward; the core every engine has |
| Attention kernels | runtime/nx_attention.nx | nx_attn_score_matrix | PRESENT decl | Score matrix + softmax attention |
| LayerNorm / normalization | runtime/nx_layernorm.nx | nx_layernorm_forward | PRESENT decl | Forward normalization |
| BPE tokenizer | runtime/nx_bpe.nx | nx_bpe_vocab_new | PRESENT decl | Own byte-pair tokenizer |
| Open-weights GGUF loading | runtime/nx_gguf_load_model.nx | nx_gguf_load_model_weights | PRESENT decl | Real Qwen2.5-0.5B loads; llama.cpp is the GGUF home; vLLM/TRT prefer safetensors |
| Int4 quantized inference | runtime/nx_q4k_matmul.nx | nx_q4k_dot_row_col | PRESENT decl | Q4-K dot kernels; llama.cpp K-quants lead CPU int4 |
| SIMD-tuned CPU kernels | runtime/nx_nofloat_gemm.nx | i32x8_hsum | PRESENT decl | AVX2 integer GEMM (7x pooled); llama.cpp hand-tuned CPU leads; TRT is GPU-only |
| Served chat API (OpenAI-shaped) | runtime/nx_f32_llm_serve.nx | ls_extract_prompt | PRESENT decl | Sovereign seat on :11434 serving real Qwen (loopback seam); vLLM leads production serving |
| Training / autodiff substrate | runtime/nx_autograd_tensor.nx | ta_new | PRESENT decl | Tensor reverse-mode autograd; peers are inference-only (llama.cpp partial LoRA) |
| KV-cache / paged attention | runtime/nx_kvcache.nx | kv_paged_attn | WATCHING decl | vLLM invented PagedAttention; Nishi re-computes |
| Continuous batching throughput | runtime/nx_batch_serve.nx | bs_continuous_batch | WATCHING decl | vLLM continuous batching leads; Nishi single-stream |
| Speculative decoding | runtime/nx_specdec.nx | sd_draft_verify | WATCHING decl | Draft-model acceleration; Nishi none |
| Mixture-of-experts | runtime/nx_moe.nx | moe_route_experts | WATCHING decl | Sparse expert routing; Nishi dense-only |
| Long-context inference (100K+) | runtime/nx_longctx.nx | lctx_rope_scale | WATCHING decl | RoPE scaling / context extension; Nishi short-context |
| Marlin-class fused dequant GEMM | runtime/nx_marlin.nx | mq_fused_dequant_gemm | WATCHING decl | Fused quantized-read GEMM; the named Nishi next rung (F32 re-dequant is the measured wall) |
| GPU acceleration | runtime/nx_gpu_llm.nx | gpul_offload_layer | WATCHING decl | CUDA/Metal offload; Nishi CPU-integer by design today; TRT is NVIDIA-optimal |
| Competitive CPU speed (20+ tok/s at 0.5B) | runtime/nx_cpu_speed_bar.nx | csb_decode_bar | WATCHING decl | Measured honest (F-004 remeasure 2026-07-17, healthy 17-thread build): Nishi i8 DECODE ~15 tok/s bench / 23 warm vs llama.cpp cited 20-60 = ~1-4x behind on decode; PREFILL ~9 tok/s = the remaining wall. The prior 1.5 tok/s conflated prefill with decode. The contract is the BENCH organ that publishes decode and prefill tok/s on the beat against the declared bar -- the flip says the ruler exists; the bar itself is the rung's done-rule |
| Batched prefill (the prefill wall) | runtime/nx_nofloat_serve_core.nx | nsv_prefill_batch | WATCHING decl | Prefill runs the prompt as m looped m=1 matmuls today (~9 tok/s, FLAT across m -- the diagnostic that we are not batching); every serving stack batches prefill. ONE contract shared with /compare/coding: the symbol lives in the serve core and both cells flip together when it lands |
| Sovereign -- own language, compiler, kernels; zero PyTorch / CUDA / BLAS beneath | runtime/nx_nofloat_llm.nx | qmul | PRESENT decl | Whole stack bits-up ours; llama.cpp lean C++ but still foreign toolchain/runtime |
| Integer-deterministic bit-exact inference by construction | runtime/nx_q4k_matmul.nx | nx_q4k_dot_row_col | PRESENT decl | No-float integer path reproduces bit-identically; GPU stacks are nondeterministic |
watch rows=20 landed=0 watching=9 present=11 missing=0 absent=0 (partition sums)