e to sidebar hide Navigation Main page Contents Current events Random article About Wikipedia Contact us Contribute Help Learn to edit Community portal Recent changes Upload file Special pages Print/export Download as PDF Printable version In other projects Wikidata item Search Search Appearance Donate Create account Log in Personal tools Donate Create account Log in Contents move to sidebar hide (Top) 1 Background Toggle Background subsection 1.1 Heterogeneous System Architecture Intermediate Language 2 Programming abilities 3 Hardware support Toggle Hardware support subsection 3.1 Professional-grade GPUs 3.2 Consumer-grade GPUs 4 Software ecosystem Toggle Software ecosystem subsection 4.1 Machine learning 4.2 Supercomputing 4.3 Other acceleration and graphics interoperation 4.4 Other languages 4.4.1 Julia 4.5 Software distribution 4.5.1 Official 4.5.2 Third-party 5 Components Toggle Components subsection 5.1 Low-level 5.1.1 ROCk – Kernel driver 5.1.2 ROCm – Device libraries 5.1.3 ROCt – Thunk 5.1.4 ROCr – Runtime 5.1.5 ROCm – CompilerSupport 5.2 Mid-level 5.2.1 ROCclr Common Language Runtime 5.2.2 OpenCL 5.2.3 HIP – Heterogeneous Interface for Portability 5.2.4 HIPCC 5.2.5 HIPIFY 5.2.6 GPUFORT 5.3 High-level 5.3.1 rocBLAS / hipBLAS 5.3.2 rocSOLVER / hipSOLVER 5.4 Utilities 6 Comparison with competitors Toggle Comparison with competitors subsection 6.1 Nvidia CUDA 6.2 Intel OneAPI 6.2.1 Unified Acceleration Foundation (UXL) 7 See also 8 References 9 External links Toggle the table of contents ROCm 6 languages Català Español Eesti 한국어 Português 中文 Edit links Article Talk English Read Edit View history Tools Tools move to sidebar hide Actions Read Edit View history General What links here Related changes Upload file Permanent link Page information Cite this page Get shortened URL Print/export Download as PDF Printable version In other projects Wikidata item Appearance move to sidebar hide From Wikipedia, the free encyclopedia Parallel computing platform: GPGPU libraries and application programming interface ROCm Developer AMD Release November 14, 2016 ; 9 years ago  ( 2016-11-14 ) Stable release 7.2.4 [ 1 ]   / 29 May 2026 ; 24 days ago  ( 29 May 2026 ) Written in C , C++ , Python , Fortran , Julia Middleware HIP Engine AMDgpu kernel driver , HIPCC , a LLVM -based compiler Operating system Linux , Windows [ 2 ] Platform Supported GPUs Predecessor Close to metal , Stream , HSA Size <2 GiB Type GPGPU libraries and APIs License MIT License Website www .amd .com /en /products /software /rocm .html Repository Meta-repository github .com /ROCm /ROCm ROCm is an Advanced Micro Devices (AMD) software stack for graphics processing unit (GPU) programming. ROCm spans several domains, including general-purpose computing on graphics processing units (GPGPU), high-performance computing (HPC), and heterogeneous computing . It offers several programming models: HIP ( GPU-kernel-based programming ), OpenMP ( directive-based programming ), and OpenCL . ROCm is free, libre and open-source software (except the GPU firmware blobs [ 3 ] ), and it is distributed under various licenses. The name initially stood for Radeon Open Compute platform; [ 4 ] however, due to Open Compute being a registered trademark, the name no longer functions as an acronym. [ 5 ] [ non-primary source needed ] Background [ edit ] The first GPGPU software stack from ATI /AMD was Close to Metal , which became Stream . ROCm was launched around 2016 [ 6 ] with the Boltzmann Initiative . [ 7 ] ROCm stack builds upon previous AMD GPU stacks; some tools trace back to GPUOpen and others to the Heterogeneous System Architecture (HSA). Heterogeneous System Architecture Intermediate Language [ edit ] HSAIL [ 8 ] was aimed at producing a middle-level, hardware-agnostic intermediate representation that could be JIT-compiled to the eventual hardware (GPU, FPGA...) using the appropriate finalizer. This approach was dropped for ROCm: now it builds only GPU code, using LLVM , and its AMDGPU backend that was upstreamed, [ 9 ] although there is still research on such enhanced modularity with LLVM MLIR. [ 10 ] Programming abilities [ edit ] This section needs expansion . You can help by adding missing information . ( January 2022 ) ROCm as a stack ranges from the kernel driver to the end-user applications. AMD has introductory videos about AMD GCN hardware, [ 11 ] and ROCm programming [ 12 ] via its learning portal. [ 13 ] One of the best technical introductions about the stack and ROCm/HIP programming, remains, to date, to be found on Reddit. [ 14 ] Hardware support [ edit ] ROCm is primarily targeted at discrete professional GPUs, [ 15 ] but consumer GPUs and APUs of the same architecture as a supported professional GPU are known to work with ROCm. For example, all professional GPUs of the RDNA 2 architecture are officially supported by ROCm 5.x; users report that Consumer RDNA2 units such as the Radeon 6800M APU and the Radeon 6700XT GPU also work. [ 16 ] See also: List of AMD graphics processing units Professional-grade GPUs [ edit ] See also: AMD Instinct accelerators and Radeon Pro Consumer-grade GPUs [ edit ] Name of GPU series Southern Islands Sea Islands Volcanic Islands Arctic Islands/Polaris Vega Navi 1X Navi 2X Navi 3X Navi 4X Released Jan 2012 Sep 2013 Jun 2015 Jun 2016 Jun 2017 Jul 2019 Nov 2020 Dec 2022 Jan 2025 Marketing Name Radeon HD 7000 Radeon Rx 200 Radeon Rx 300 Radeon RX 400/500 Radeon RX Vega/Radeon VII(7 nm) Radeon RX 5000 Radeon RX 6000 Radeon RX 7000 Radeon RX 9000 AMD support Instruction set GCN instruction set RDNA instruction set Microarchitecture GCN 1st gen GCN 2nd gen GCN 3rd gen GCN 4th gen GCN 5th gen RDNA RDNA 2 RDNA 3 RDNA 4 Type Unified shader model ROCm need env var in 5.x [ 17 ] dropped in 6.x [ 18 ] [ a ] OpenCL 1.2 (on Linux : 1.1 (no Image support) with Mesa 3D) 2.0 (Adrenalin driver on Win7+ ) (on Linux : 1.1 (no Image support) with Mesa 3D, 2.0 with AMD drivers or AMD ROCm) 2.0 2.1 [ 21 ] Vulkan 1.0 ( Win 7+ or Mesa 17+ ) 1.2 (Adrenalin 20.1, Linux Mesa 3D 20.0) 1.3 Shader model 5.1 5.1 6.3 6.4 6.5 6.7 OpenGL 4.6 (on Linux: 4.6 (Mesa 3D 20.0)) Direct3D 11 ( 11_1 ) 12 ( 11_1 ) 11 ( 12_0 ) 12 ( 12_0 ) 11 ( 12_1 ) 12 ( 12_1 ) 11 ( 12_1 ) 12 ( 12_2 ) /drm/amdgpu [ b ] Experimental [ 22 ] ^ Navi 1.x support in rocBLAS was broken until version 6.1. Before version 5.3 an environmental variable could be used to force the use of gfx1030 code on these GPUs for some functionality, but version 5.3 caused gfx1030 code to no longer run on gfx1010 GPUs. [ 19 ] [ 20 ] ^ DRM ( Direct Rendering Manager ) is a component of the Linux kernel . Software ecosystem [ edit ] Machine learning [ edit ] Various deep learning frameworks have a ROCm backend: [ 23 ] PyTorch TensorFlow ONNX MXNet CuPy [ 24 ] MIOpen Caffe Iree (which uses LLVM Multi-Level Intermediate Representation (MLIR)) llama.cpp Supercomputing [ edit ] ROCm is gaining significant traction in the top 500 . [ 25 ] ROCm is used with the Exascale supercomputers El Capitan [ 26 ] [ 27 ] and Frontier . Some related software is to be found at AMD Infinity hub . Other acceleration and graphics interoperation [ edit ] As of version 3.0, Blender can use HIP compute kernels for its renderer cycles. [ 28 ] Other languages [ edit ] Julia [ edit ] Julia has the AMDGPU.jl package, [ 29 ] which integrates with LLVM and selects components of the ROCm stack. Instead of compiling code through HIP, AMDGPU.jl uses Julia's compiler to generate LLVM IR directly, which is later consumed by LLVM to generate native device code. AMDGPU.jl uses ROCr's HSA implementation to upload native code onto the device and execute it, similar to how HIP loads its own generated device code. AMDGPU.jl also supports integration with ROCm's rocBLAS (for BLAS), rocRAND (for random number generation), and rocFFT (for FFTs). Future integration with rocALUTION, rocSOLVER, MIOpen, and certain other ROCm libraries is planned. Software distribution [ edit ] Official [ edit ] Installation instructions are provided for Linux and Windows in the official AMD ROCm documentation . ROCm software is currently spread across several public GitHub repositories. Within the main public meta-repository , there is an XML manifest for each official release: using git-repo , a version control tool built on top of Git , is the recommended way to synchronize with the stack locally. [ 30 ] AMD starts distributing containerized applications for ROCm, notably scientific research applications gathered under AMD Infinity Hub . [ 31 ] AMD distributes itself packages tailored to various Linux distributions. Further information: AMD Radeon Software Third-party [ edit ] There is a growing third-party ecosystem packaging ROCm . Linux distributions are officially packaging (natively) ROCm, with various degrees of advancement: Arch Linux , [ 32 ] Gentoo, [ 33 ] Debian , Fedora , [ 34 ] GNU Guix , and NixOS . There are Spack packages. [ 35 ] Components [ edit ] This section needs expansion . You can help by adding missing information . ( January 2022 ) There is one kernel-space component, ROCk, and the rest –  there is roughly a hundred components in the stack –  is made of user-space modules. The unofficial typographic policy is to use: uppercase ROC, lowercase following for low-level libraries, i.e. ROCt, and the contrary for user-facing libraries, i.e. rocBLAS. [ 36 ] AMD is active developing with the LLVM community, but upstreaming is not instantaneous, and as of January 2022, is still lagging. [ 37 ] AMD still officially packages various LLVM forks [ 38 ] [ 39 ] [ 10 ] for parts that are not yet upstreamed –  compiler optimizations destined to remain proprietary, debug support, OpenMP offloading, etc. Low-level [ edit ] ROCk – Kernel driver [ edit ] Main article: AMDgpu (Linux kernel module) ROCm – Device libraries [ edit ] Support libraries implemented as LLVM bitcode. These provide various utilities and functions for math operations, atomics, queries for launch parameters, on-device kernel launch, etc. ROCt – Thunk [ edit ] The thunk is responsible for all the thinking and queuing that goes into the stack. ROCr – Runtime [ edit ] The ROC runtime is a set of APIs/libraries that allows the launch of compute kernels by host applications. It is AMD's implementation of the HSA runtime API. [ 40 ] It is different from the ROC Common Language Runtime. ROCm – CompilerSupport [ edit ] ROCm code object manager is in charge of interacting with LLVM intermediate representation . Mid-level [ edit ] ROCclr Common Language Runtime [ edit ] The common language runtime is an indirection layer adapting calls to ROCr on Linux and PAL on windows. It used to be able to route between different compilers, like the HSAIL-compiler. It is now being absorbed by the upper indirection layers (HIP and OpenCL). OpenCL [ edit ] Further information: OpenCL ROCm ships its installable client driver (ICD) loader and an OpenCL [ 41 ] implementation bundled together . As of January 2022, ROCm 4.5.2 ships OpenCL 2.2, and is lagging behind competition. [ 42 ] HIP – Heterogeneous Interface for Portability [ edit ] The AMD implementation for its GPUs is called HIPAMD . There is also a CPU implementation mostly for demonstration purposes. HIPCC [ edit ] HIP builds a HIPCC compiler that either wraps Clang and compiles with LLVM open AMDGPU backend, or redirects to the NVIDIA compiler . [ 43 ] HIPIFY [ edit ] HIPIFY is a source-to-source compiling tool. It translates CUDA to HIP and reverse, either using a Clang-based tool, or a sed-like Perl script. GPUFORT [ edit ] Like HIPIFY, GPUFORT is a tool compiling source code into other third-generation-language sources, allowing users to migrate from CUDA Fortran to HIP Fortran. It is also in the repertoire of research projects, even more so. [ 44 ] High-level [ edit ] ROCm high-level libraries are usually consumed directly by application software, such as machine learning frameworks. Most of the following libraries are in the General Matrix Multiply (GEMM) category, which GPU architecture excels at. The majority of these user-facing libraries comes in dual-form: hip for the indirection layer that can route to Nvidia hardware, and roc for the AMD implementation. [ 45 ] rocBLAS / hipBLAS [ edit ] rocBLAS and hipBLAS are central in high-level libraries, it is the AMD implementation for Basic Linear Algebra Subprograms . It uses the library Tensile privately. rocSOLVER / hipSOLVER [ edit ] This pair of libraries constitutes the LAPACK implementation for ROCm and is strongly coupled to rocBLAS. Utilities [ edit ] ROCm developer tools : Debug, tracer, profiler, System Management Interface, Validation suite, Cluster management. GPUOpen tools : GPU analyzer, memory visualizer... External tools: radeontop ( TUI overview) Comparison with competitors [ edit ] ROCm competes with other GPU computing stacks: Nvidia CUDA and Intel OneAPI . Nvidia CUDA [ edit ] Main article: CUDA Nvidia's CUDA is closed-source, whereas AMD ROCm is open source. There is open-source software built on top of the closed-source CUDA, for instance RAPIDS . CUDA is able to run on consumer GPUs, whereas ROCm support is mostly offered for professional hardware such as AMD Instinct and AMD Radeon Pro . Nvidia provides a C/C++-centered frontend and its Parallel Thread Execution (PTX) LLVM GPU backend as the Nvidia CUDA Compiler (NVCC). Intel OneAPI [ edit ] Main article: OneAPI (compute acceleration) All the oneAPI corresponding libraries are published on its GitHub Page . Unified Acceleration Foundation (UXL) [ edit ] Unified Acceleration Foundation (UXL) is a new technology consortium that are working on the continuation of the OneAPI initiative, with the goal to create a new open standard accelerator software ecosystem, related open standards and specification projects through Working Groups and Special Interest Groups (SIGs). The goal will compete with Nvidia's CUDA. The main companies behind it are Intel, Google, Arm, Qualcomm, Samsung, Imagination, and VMware. [ 46 ] See also [ edit ] AMD Software – a general overview of AMD's drivers, APIs, and development endeavors. GPUOpen – AMD's complementary graphics stack AMD Radeon Software – AMD's software distribution channel References [ edit ] ^ "ROCm 7.2.4 Release" . May 29, 2026 . Retrieved May 29, 2026 . ^ "New HIP SDK helps democratize GPU Computing" . July 27, 2023. ^ "Details of package firmware-amd-graphics in buster" . Debian . Retrieved January 18, 2022 . ^ Crider, Michael (August 29, 2025). "Watch: AMD talks ROCm and how it's a game-changer for Radeon PCs" . PC World . Retrieved January 30, 2026 . ^ "Question: What does ROCm stand for? · Issue #1628" . RadeonOpenCompute/ROCm . Github.com . Retrieved January 18, 2022 . ^ "AMD @ SC16: Radeon Open Compute Platform (ROCm) 1.3 Released, Boltzmann Comes to Fruition" . anandtech.com . Archived from the original on November 14, 2016 . Retrieved January 19, 2022 . ^ "AMD @ SC15: Boltzmann Initiative Announced - C++ and CUDA Compilers for AMD GPUs" . anandtech.com . Archived from the original on November 17, 2015 . Retrieved January 19, 2022 . ^ "HSA Programmer's Reference Manual: HSAIL Virtual ISA and Programming Model, Compiler Writer, and Object Format (BRIG)" (PDF) . HSA Foundation. May 2, 2018 . Retrieved August 1, 2023 . ^ "User Guide for AMDGPU Backend — LLVM 13 documentation" . Llvm.org . Retrieved January 18, 2022 . ^ a b "The LLVM Compiler Infrastructure" . GitHub . January 19, 2022. ^ "Introduction to AMD GPU Hardware" . June 12, 2020 – via www.youtube.com. ^ "Fundamentals of HIP Programming" . Archived from the original on February 7, 2023. ^ "ROCm™ Learning Center" . AMD . ^ "AMD ROCm / HCC programming: Introduction" . December 26, 2018. ^ "ROCm Getting Started Guide v5.2.3" . Archived from the original on October 2, 2022. ^ "Here's something you don't see every day: PyTorch running on top of ROCm on a 6800M (6700XT) laptop! Took a ton of minor config tweaks and a few patches but it actually functionally works. HUGE!" . December 10, 2021. ^ "HOW-TO: Stable Diffusion on an AMD GPU" . September 23, 2022. ROC_ENABLE_PRE_VEGA ^ "Changelog — ROCm 6.0.0 Documentation" . rocm.docs.amd.com . AMD Instinct MI50, Radeon Pro VII, and Radeon VII products (collectively gfx906 GPUs) enters maintenance mode in ROCm 6.0. [...] end of maintenance [EOM] will be aligned with the closest ROCm release [...] Distribution and operating system updates will continue per the ROCm release cadence for gfx906 GPUs until EOM. ^ "PSA: RDNA1 (gfx1010/gfx101*) GPUs should start working soon with official packages, hopefully with ROCm 6.1" . www.reddit.com . ^ "Any update on 5700 Xt support?" . GitHub . – ^ "AMD Radeon RX 6800 XT Specs" . TechPowerUp . Retrieved January 1, 2021 . ^ Larabel, Michael (December 7, 2016). "The Best Features of the Linux 4.9 Kernel" . Phoronix . Retrieved December 7, 2016 . ^ "AMD Introduces Its Deep-Learning Accelerator Instinct MI200 Series GPUs" . Infoq.com . Retrieved January 18, 2022 . ^ "Using CuPy on AMD GPU (experimental)" . ^ "AMD Chips Away at Intel in World's Top 500 Supercomputers as GPU War Looms" . November 16, 2020. ^ "El Capitan Supercomputer Detailed: AMD CPUs & GPUs to Drive 2 Exaflops of Compute" . {{ cite web }} : CS1 maint: deprecated archival service ( link ) ^ "Livermore's el Capitan Supercomputer to Debut HPE 'Rabbit' Near Node Local Storage" . February 18, 2021. ^ "Blender 3.0 takes support for AMD GPUs to the next level. Beta support available now!" . AMD GPUOpen . November 15, 2021 . Retrieved January 18, 2022 . ^ "AMD ROCm ⋅ JuliaGPU" . juliagpu.org . Archived from the original on June 13, 2020 . Retrieved January 23, 2022 . ^ "ROCm Installation v4.3 — ROCm 4.5.0 documentation" . Rocmdocs.amd.com . Retrieved January 18, 2022 . ^ "Running Scientific Applications on AMD Instinct Accelerators Just Got Easier" . HPCwire.com . October 18, 2021 . Retrieved January 25, 2022 . ^ "ROCm for Arch Linux" . Github.com . January 17, 2022 . Retrieved January 18, 2022 . ^ "Gentoo Linux Packages Up AMD ROCm, Makes Progress On RISC-V, LTO+PGO Python" . Phoronix.com . Retrieved January 18, 2022 . ^ "Fedora & Debian Developers Look At Packaging ROCm For Easier Radeon GPU Computing Experience" . Phoronix.com . Retrieved January 18, 2022 . ^ Gamblin, Todd; LeGendre, Matthew; Collette, Michael R.; Lee, Gregory L.; Moody, Adam; de Supinski, Bronis R.; Futral, Scott (November 15, 2015). "The Spack Package Manager: Bringing Order to HPC Software Chaos" – via GitHub. ^ Bloor, Cordell. "20211221 Packaging session notes and small update" . debian-ai@lists.debian.org (Mailing list) . Retrieved January 18, 2022 . ^ "[Debian official packaging] How is ROCm LLVM fork still needed? · Issue #2449" . ROCm-Developer-Tools/HIP . GitHub . ^ "Aomp - V 14.0-1" . GitHub . January 22, 2022. ^ "The LLVM Compiler Infrastructure" . GitHub . January 10, 2022. ^ "HSA Runtime Programmer's Reference Manual" (PDF) . HSA Foundation. May 2, 2018 . Retrieved August 1, 2023 . ^ "Khronos OpenCL Registry - The Khronos Group Inc" . www.khronos.org . ^ "List of OpenCL Conformant Products" . The Khronos Group Inc . February 3, 2022. ^ "Figure 3. HIPCC compilation process illustration. The clang compiler" . ^ "AMD Publishes Open-Source "GPUFORT" as Newest Effort to Help Transition Away from CUDA" . ^ Maia, Julio; Chalmers, Noel; T. Bauman, Paul; Curtis, Nicholas; Malaya, Nicholas; McDougall, Damon; van Oostrum, Rene; Wolfe, Noah (May 2021). ROCm Library Support & Profiling Tools (PDF) . AMD. ^ Cherney, Max A.; Cherney, Max A. (March 26, 2024). "Exclusive: Behind the plot to break Nvidia's grip on AI by targeting software" . Reuters . Retrieved April 5, 2024 . External links [ edit ] "ROCm official documentation" . AMD . February 10, 2022. "ROCm Learning Center" . AMD . January 25, 2022. "ROCm official documentation on the github super-project" . AMD . January 25, 2022. "ROCm official documentation - pre 5.0" . AMD . January 19, 2022. "GPU-Accelerated Applications with AMD Instinct Accelerators & AMD ROCm Software" (PDF) . AMD . January 25, 2022. "AMD Infinity Hub" . AMD . January 25, 2022. — Docker containers for scientific applications. v t e AMD Products Architecture x86-64 3DNow! Processors Desktop Geode Duron Sempron Turion Phenom Athlon FX Ryzen Server Opteron Epyc Technologies Graphics Radeon AMD Radeon Software AMDGPU AMD PowerTune CrossFire Eyefinity FreeSync Mantle Processor AGESA AMD Turbo Core Cool'n'Quiet AMD Platform Security Processor Ryzen AI Memory High Bandwidth Memory (HBM) Sockets Sockets without existing articles (e.g. FP4) are omitted from this section. Desktop Pin grid array (PGA) Super Socket 7 (Super 7) 939 AM2 AM2+ AM3 AM3+ FM1 FM2 FM2+ AM1 AM4 Land grid array (LGA) TR4 sTRX4 AM5 sTR5 Other Slot A Mobile Pin grid array (PGA) 563 S1 FS1 Ball grid array (BGA) FT1 FP2 FT3 FP3 Server Pin grid array (PGA) 940 Land grid array (LGA) F F+ G3 G34 C32 SP3 Mixed Pin grid array (PGA) Socket A (Socket 462) 754 Product lists List of AMD microprocessors List of AMD graphics processing units List of AMD accelerated processing units List of AMD CPU microarchitectures List of AMD chipsets People Founders Jerry Sanders CEOs Jerry Sanders (1969–2002) Hector Ruiz (2002–2008) Dirk Meyer (2008–2011) Rory Read (2011–2014) Lisa Su (2014–present) Acquisitions ATI Technologies SeaMicro Xilinx Joint ventures AMD–Chinese joint venture Hygon Information Technology TF-AMD Tongfu Microelectronics Litigation Intel Corp. v. Advanced Micro Devices, Inc. (2004) Advanced Micro Devices, Inc. v. Intel Corp. (2005) Related Vulkan (API) NexGen Spansion AMD Live! Performance Rating Torrenza GlobalFoundries Italics indicates an unreleased product (e.g. socket) Strikethrough indicates a product that was never released. Mixed indicates sockets that are designed for or integrated with one or more platforms. v t e AMD technology Software AGESA AMDgpu AMD Software Vivado Xilinx ISE Platforms Current ROCm GPUOpen Obsolete Spider Dragon Horus Technology Cool'n'Quiet High Bandwidth Memory PowerNow! PowerPlay PowerTune Turbo Core ASTC AMD Wraith Virtex XDNA Ryzen AI Instructions X86-64 3DNow! AVX XOP CVT16/F16C FMA FMA4 FMA3 BMI ABM BMI1 TBM SSE5 ASF AES v t e AMD graphics Radeon -brand List of GPUs ( GPU features template ) and List of APUs ( APU features template ) Fixed pipeline Wonder Mach Rage All-in-Wonder (before 2000) Vertex and fragment shaders R100 R200 R300 R400 R500 All-in-Wonder (after 1999) Unified shaders HD 2000 HD 3000 HD 4000 HD 5000 HD 6000 Unified shaders & memory HD 7000 HD 8000 200 300 400 500 RX Vega 600 RX 5000 Ray tracing RX 6000 Ray tracing & AI cores RX 7000 RX 9000 Software and technologies Multimedia acceleration UVD (video decoding) VCE (video encoding) VCN (video decoding + encoding) Software Current AMD Radeon Software (GPU drivers & control) ROCm (compute platform) AMDGPU (open-source driver) GPUOpen (developer tools) TressFX (real-time hair/fur effects) HLSL2GLSL (shader translation) Obsolete Catalyst (legacy driver) Mantle (deprecated API) AMD APP SDK (compute SDK) CodeXL (profiling & debugging) GPU PerfStudio (GPU analysis) CTM (low-level API) Technologies TrueAudio (stereo 3D) Eyefinity (multi-monitor) FreeSync (variable refresh rate) PowerTune (dynamic power management) CrossFire (multi-GPU) Hybrid Graphics (integrated + discrete) HyperMemory (shared system memory) HyperZ (memory bandwidth optimization) HSA (CPU + GPU compute) GPU microarchitectures TeraScale ( 2 , 3 ) GCN ( 2 , 3 , 4 , 5 ) RDNA ( 2 , 3 , 4 ) UDNA Other products Workstations & supercomputers Current Radeon Pro Radeon Instinct Obsolete FireGL/FirePro FireMV FireStream Consoles Flipper ( GameCube ) Xenos ( Xbox 360 ) Hollywood ( Wii ) Liverpool ( PlayStation 4 ) Durango ( Xbox One ) Neo ( PlayStation 4 Pro ) Scorpio ( Xbox One X ) Atari VCS (2021) Oberon ( PlayStation 5 ) Oberon Plus ( PlayStation 5 Slim ) Project Lockhart ( Xbox Series S ) Project Scarlett ( Xbox Series X ) Viola ( PlayStation 5 Pro ) Handheld PCs Aya Neo OneXPlayer Valve Steam Deck Ayaneo 2 Asus ROG Ally Lenovo Legion Go Microsoft "Asus" ROG Xbox Ally Lenovo Legion Go S MSI Claw A8 v t e Graphics processing unit GPU Desktop Intel GT Xe Arc Nvidia GeForce Quadro Tesla Tegra AMD Radeon Radeon Pro Instinct Matrox InfiniteReality NEC µPD7220 3dfx Voodoo S3 Glaze3D Apple silicon Jingjia Micro Tseng Labs SiS Mobile Adreno Apple silicon Mali PowerVR VideoCore Vivante Imageon Intel 2700G Architecture Compute kernel Fabrication CMOS FinFET MOSFET Graphics pipeline Geometry Vertex HDR rendering MAC Rasterisation Shading Ray-tracing SIMD SIMT Tessellation T&L Tiled rendering Unified shader model Components Blitter Geometry processor Input–output memory management unit Render output unit Shader unit Stream processor Tensor unit Texture mapping unit Video display controller Video processing unit Memory DMA Framebuffer SGRAM GDDR GDDR2 GDDR3 GDDR4 GDDR5 GDDR6 GDDR7 HBM HBM2 HBM2E HBM3 HBM-PIM HBM3E Memory bandwidth Memory controller Shared graphics memory Texture memory VRAM Form factor IP core Discrete graphics Clustering Switching External graphics Integrated graphics System on a chip Performance Clock rate Display resolution Fillrate Pixel/s Texel/s FLOP/s Frame rate Performance per watt Transistor count Misc 2D Scrolling Sprite Tile 3D GI Texture Z-buffering ASIC GPGPU Graphics library Hardware acceleration Image processing Compression Parallel computing SIMT Vector processor Video coding Codec VLIW v t e Parallel computing General Distributed computing Parallel computing Parallel algorithm Massively parallel Cloud computing High-performance computing Multiprocessing Manycore processor GPGPU Computer network Systolic array Levels Bit Instruction Thread Task Data Memory Loop Pipeline Multithreading Temporal Simultaneous (SMT) Simultaneous and heterogenous Speculative (SpMT) Preemptive Cooperative Clustered multi-thread (CMT) Hardware scout Theory PRAM model PEM model Analysis of parallel algorithms Amdahl's law Gustafson's law Cost efficiency Karp–Flatt metric Slowdown Speedup Elements Process Thread Fiber Instruction window Array Coordination Multiprocessing Memory coherence Cache coherence Cache invalidation Barrier Synchronization Application checkpointing Programming Stream processing Dataflow programming Models Implicit parallelism Explicit parallelism Concurrency Non-blocking algorithm Hardware Flynn's taxonomy SISD SIMD Array processing (SIMT) Pipelined processing Associative processing MISD MIMD Dataflow architecture Pipelined processor Superscalar processor Vector processor Multiprocessor symmetric asymmetric Memory shared distributed distributed shared UMA NUMA COMA Massively parallel computer Computer cluster Beowulf cluster Grid computer Hardware acceleration APIs Ateji PX Boost Chapel HPX Charm++ Cilk Coarray Fortran CUDA Dryad C++ AMP Global Arrays GPUOpen MPI OpenMP OpenCL OpenHMPP OpenACC Parallel Extensions PVM pthreads RaftLib ROCm UPC TBB ZPL Problems Automatic parallelization Cache stampede Deadlock Deterministic algorithm Embarrassingly parallel Parallel slowdown Race condition Software lockout Scalability Starvation   Category: Parallel computing v t e Processor technologies Models Abstract machine Stored-program computer Finite-state machine with datapath Hierarchical Deterministic finite automaton Queue automaton Cellular automaton Quantum cellular automaton Turing machine Alternating Turing machine Universal Post–Turing Quantum Nondeterministic Turing machine Probabilistic Turing machine Hypercomputation Zeno machine Belt machine Stack machine Register machines Counter Pointer Random-access Random-access stored program Architecture Microarchitecture Von Neumann Harvard modified Dataflow Transport-triggered Cellular Endianness Memory access NUMA HUMA Load–store Register/memory Cache hierarchy Memory hierarchy Virtual memory Secondary storage Heterogeneous Fabric Multiprocessing Cognitive Neuromorphic Instruction set architectures Types Orthogonal instruction set CISC RISC Application-specific EDGE TRIPS VLIW EPIC MISC OISC NISC ZISC VISC architecture Quantum computing Comparison Addressing modes Instruction sets Motorola 68000 series VAX PDP-11 x86 ARM Stanford MIPS MIPS MIPS-X Power POWER PowerPC Power ISA Clipper architecture SPARC SuperH DEC Alpha ETRAX CRIS M32R Unicore Itanium OpenRISC RISC-V MicroBlaze LMC System/3x0 S/360 S/370 S/390 z/Architecture Tilera ISA VISC architecture Epiphany architecture Others Execution Instruction pipelining Pipeline stall Operand forwarding Classic RISC pipeline Hazards Data dependency Structural Control False sharing Out-of-order Scoreboarding Tomasulo's algorithm Reservation station Re-order buffer Register renaming Wide-issue Speculative Branch prediction Memory dependence prediction Parallelism Level Bit Bit-serial Word Instruction Pipelining Scalar Superscalar Task Thread Process Data Vector Memory Distributed Multithreading Temporal Simultaneous Hyperthreading Simultaneous and heterogenous Speculative Preemptive Cooperative Flynn's taxonomy SISD SIMD Array processing (SIMT) Pipelined processing Associative processing SWAR MISD MIMD SPMD Processor performance Transistor count Instructions per cycle (IPC) Cycles per instruction (CPI) Instructions per second (IPS) Floating-point operations per second (FLOPS) Transactions per second (TPS) Synaptic updates per second (SUPS) Performance per watt (PPW) Cache performance metrics Computer performance by orders of magnitude Types Central processing unit (CPU) Graphics processing unit (GPU) GPGPU Vector Barrel Stream Tile processor Coprocessor PAL ASIC FPGA FPOA CPLD Multi-chip module (MCM) System in a package (SiP) Package on a package (PoP) By application Embedded system Microprocessor Microcontroller Mobile Ultra-low-voltage ASIP Soft microprocessor Systems on chip System on a chip (SoC) Multiprocessor (MPSoC) Cypress PSoC Network on a chip (NoC) Hardware accelerators Coprocessor AI accelerator Graphics processing unit (GPU) Image processor Vision processing unit (VPU) Physics processing unit (PPU) Digital signal processor (DSP) Tensor Processing Unit (TPU) Secure cryptoprocessor Network processor Baseband processor Word size 1-bit 4-bit 8-bit 12-bit 15-bit 16-bit 24-bit 32-bit 48-bit 64-bit 128-bit 256-bit 512-bit bit slicing others variable Core count Single-core Multi-core Manycore Heterogeneous architecture Components Core Cache CPU cache Scratchpad memory Data cache Instruction cache replacement policies coherence Bus Clock rate Clock signal FIFO Functional units Arithmetic logic unit (ALU) Address generation unit (AGU) Floating-point unit (FPU) Memory management unit (MMU) Load–store unit Translation lookaside buffer (TLB) Branch predictor Branch target predictor Integrated memory controller (IMC) Memory management unit Instruction decoder Logic Combinational Sequential Glue Logic gate Quantum Array Registers Processor register Status register Stack register Register file Memory buffer Memory address register Program counter Control unit Hardwired control unit Instruction unit Data buffer Write buffer Microcode ROM Counter Datapath Multiplexer Demultiplexer Adder Multiplier CPU Binary decoder Address decoder Sum-addressed decoder Barrel shifter Circuitry Integrated circuit 3D Mixed-signal Power management Boolean Digital Analog Quantum Switch Power management PMU APM ACPI Dynamic frequency scaling Dynamic voltage scaling Clock gating Performance per watt (PPW) Related History of general-purpose CPUs Microprocessor chronology Processor design Digital electronics Hardware security module Semiconductor device fabrication Tick–tock model Pin grid array Chip carrier v t e Numerical linear algebra Key concepts Floating point Numerical stability Problems System of linear equations Matrix decompositions Matrix multiplication ( algorithms ) Matrix splitting Sparse problems Hardware CPU cache TLB Cache-oblivious algorithm SIMD Multiprocessing Software ATLAS MATLAB Basic Linear Algebra Subprograms (BLAS) LAPACK Specialized libraries Portals : Computer programming Free and open-source software Linux Engineering Electronics Technology Mathematics Retrieved from " https://en.wikipedia.org/w/index.php?title=ROCm&oldid=1358800480 " Categories : AMD software Application programming interfaces Concurrent computing GPGPU GPGPU libraries Graphics cards Graphics hardware Heterogeneous computing Machine learning Parallel computing Supercomputers Hidden categories: CS1 maint: deprecated archival service Articles with short description Short description is different from Wikidata Use American English from December 2022 All Wikipedia articles written in American English Use mdy dates from December 2022 All pages needing factual verification Wikipedia articles needing factual verification from January 2026 Articles to be expanded from January 2022 All articles to be expanded This page was last edited on 11 June 2026, at 01:42  (UTC) . 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