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nx_f32_attn_paged.nx

buildroot/runtime/nx_f32_attn_paged.nx

3541 B100 linesdepth 7pulls 12 transitivereach 11 importersview sourcekind librarytopic f32
docsdependenciesstructsconstsfunctions

about

nx_f32_attn_paged.nx -- PAGED-KV attention: the paged twin of nx_f32_attn_with_cache. Identical math (same nx_f32_attn_multi core, same offset-causal q_pos = total_k - n_q + i, same GQA head grouping, same scatter) -- ONLY the K/V storage differs: rows come from the paged pool via the sequence's page table instead of a contiguous stripe. Bit-exactness vs the contiguous path is gated by nx_paged_kv_gate. Caller contract (mirrors the contiguous stack): nx_pkv_ensure_append ONCE per step (stack level, before layer 0), then per layer this function appends + attends; nx_pkv_advance ONCE after all layers. genealogy_id: kwon_2023_pagedattention + vaswani_2017_attention lineage_id: substrate_attn_paged_v1

dependencies 4 imports · 11 importers

nx_syscalls.nx nx_tier.nx nx_kvcache.nx nx_f32_attn_multi.nx nx_f32_attn_paged.nx nx_batched_gate.nx nx_batched_tput.nx nx_f32_llama_v4b.nx nx_f32_llama_v4p.nx nx_llm_batch_serve.nx nx_llm_sched.nx nx_llm_sched_gate.nx nx_paged_fwd_gate.nx nx_paged_kv_gate.nx nx_reason_paged_probe.nx

diagram shows first 10 each side; +0 more imports, +1 more importers in the complete lists below.

imports: nx_syscalls.nxnx_tier.nxnx_kvcache.nxnx_f32_attn_multi.nx

imported by: nx_batched_gate.nxnx_batched_tput.nxnx_f32_llama_v4b.nxnx_f32_llama_v4p.nxnx_llm_batch_serve.nxnx_llm_sched.nxnx_llm_sched_gate.nxnx_paged_fwd_gate.nxnx_paged_kv_gate.nxnx_reason_paged_probe.nxnx_reasoning_paged.nx

structs

none

consts

21const NX_F32_AP_OK: nx_int = 0
22const NX_F32_AP_ERR_BAD_DIM: nx_int = 1
23const NX_F32_AP_ERR_BAD_GQA: nx_int = 2
24const NX_F32_AP_ERR_SEQ: nx_int = 3

functions

26func nx_f32_attn_with_paged(