topic: f32

168 modules sharing the f32 name family (derived from the tree's prefix discipline).

Software floating point and its SIMD acceleration: the ecosystem's core is pure-integer by doctrine, and when real workloads need floats (models, media, geometry), this family provides them as library code — conversions, math kernels, and vectorized paths — rather than as a language dependency. Heavily imported by the model-serving and media lanes.

narrated overview -- maintained by the narration lane, module links verified against this wiki.

module	description	lines	funcs
_f32_intrin_probe.nx	R1b proof: NishiLang computing in HARDWARE f32 via the new	19	1
_f32_wat_kat.nx	minimal f32 program to verify the sovereign wat path emits hardware f32 (f32.add).	5	1
nx_f32.nx	IEEE 754 binary32 (single-precision float) bits-up.	628	18
nx_f32_activations.nx	bits-up f32 ML activation functions.	67	3
nx_f32_activations_test.nx	smoke for nx_f32_activations.nx.	75	2
nx_f32_adaln.nx	software-f32 adaptive LayerNorm (adaLN / adaLN-Zero) modulation, the DiT-specific brick.	108	3
nx_f32_adam_gate.nx		96	7
nx_f32_attention.nx	software-f32 multi-token scaled-dot-product attention (single head), the first	104	2
nx_f32_attn_cached.nx	bits-up f32 multi-head attention with KV cache.	151	2
nx_f32_attn_cached_test.nx	smoke for nx_f32_attn_cached.nx.	102	1
nx_f32_attn_charlm_gate.nx		260	15
nx_f32_attn_multi.nx	bits-up f32 multi-token attention kernel.	137	2
nx_f32_attn_multi_test.nx	smoke for nx_f32_attn_multi.nx.	90	2
nx_f32_attn_paged.nx	PAGED-KV attention: the paged twin of	100	1
nx_f32_autograd_gate.nx		109	11
nx_f32_block_gate.nx		125	12
nx_f32_bn_fold.nx	fold inference BatchNorm into the PRECEDING conv's weights + bias (offline), so a ResNet/	29	1
nx_f32_bn_fold_gate.nx	proof of BN-fold: exact folded W'/b', AND functional equivalence foldedconv(in) ==	60	3
nx_f32_bpe_load.nx	load BPE tokenizer vocabulary from GGUF.	182	4
nx_f32_bpe_load_test.nx	smoke for nx_f32_bpe_load.nx.	124	2
nx_f32_charlm_train_gate.nx		288	17
nx_f32_conv2d.nx	software-f32 multi-channel 2D convolution (NCHW), the R3 vision-op re-tier.	129	2
nx_f32_conv2d_backward.nx	the GRADIENT of the software-f32 2D convolution: the backward of	89	1
nx_f32_conv2d_backward_fast.nx	FAST conv2d backward via im2col + the fork-parallel nx_f32_matmul_t, the	109	1
nx_f32_conv2d_backward_fast_gate.nx	proves nx_f32_conv2d_backward_fast == nx_f32_conv2d_backward (bit-exact on	55	5
nx_f32_conv2d_backward_gate.nx	EXACT gradient check of nx_f32_conv2d_backward. Integer-valued inputs/weights	78	3
nx_f32_conv2d_fast.nx	FAST software-f32 conv2d (NCHW) via im2col + the FORK-PARALLEL nx_f32_matmul_t. The	78	1
nx_f32_conv2d_fast_gate.nx	proves nx_f32_conv2d_fast == nx_f32_conv2d_forward (bit-exact on integer values,	56	4
nx_f32_conv2d_grouped.nx	software-f32 GROUPED 2D convolution (NCHW), generalizing nx_f32_conv2d with a	81	1
nx_f32_conv2d_grouped_gate.nx	exact proof of grouped conv: depthwise (groups=C_in), a 2-group case, dense	63	3
nx_f32_conv_train_gate.nx	proves the SOVEREIGN conv TRAINING LOOP converges end-to-end: forward	108	3
nx_f32_conv_transpose2d.nx	software-f32 2D TRANSPOSED convolution / deconv (NCHW), a STANDARD vision op the	86	1
nx_f32_conv_transpose2d_gate.nx	exact proof of transposed conv: kernel-spread of a single pixel, stride-2	53	3
nx_f32_crossentropy_gate.nx		113	10
nx_f32_cvt.nx	IEEE 754 binary32 conversions (bits-up).	304	8
nx_f32_cvt_test.nx	smoke for nx_f32_cvt.nx.	61	1
nx_f32_dit_block_linear.nx	SANA-style DiT block using LINEAR attention (the efficient Z-Image DiT unit).	191	7
nx_f32_dit_block_simd.nx	SANA-DiT block with SIMD (__f32x8_dot) projections: the end-to-end fast unit.	207	8
nx_f32_dit_block_tiny.nx	first sovereign f32 DiT (Diffusion Transformer) BLOCK, assembled from the	169	4
nx_f32_div.nx	IEEE 754 binary32 division (standalone).	117	1
nx_f32_div_test.nx	smoke for nx_f32_div.nx.	29	1
nx_f32_embed_gate.nx	KAT for the NEURAL EMBEDDING TAP (rung 1 of the retrieval ladder).	155	5
nx_f32_embed_lmhead_gate.nx		161	11
nx_f32_encode.nx	the ENCODE half of f32: integer value -> IEEE-754 single	43	2
nx_f32_encode_test.nx	KAT gate: integer -> IEEE-754 single bit pattern,	41	4
nx_f32_exp.nx	IEEE 754 binary32 exp(x) bits-up.	177	3
nx_f32_exp_test.nx	smoke for nx_f32_exp.nx.	56	2
nx_f32_ffn_path_gate.nx	ISOLATED, host-noise-immune proof that the	118	6
nx_f32_gelu.nx	software-f32 EXACT GELU (erf-based, matching PyTorch nn.GELU default / HF "gelu"), the one	57	3
nx_f32_gelu_gate.nx	proof of exact GELU vs known PyTorch values (tolerance 1e-3). expect_exit: 0	41	3
nx_f32_gqa_attention.nx	software-f32 Grouped-Query multi-head attention (Ainslie 2023 GQA).	103	2
nx_f32_gqa_gate.nx		110	10
nx_f32_groupnorm.nx	software-f32 Group Normalisation (Wu & He 2018), the R3 vision-op re-tier.	146	3
nx_f32_hw.nx	HARDWARE IEEE-754 f32 for NishiLang via the __f32_* compiler intrinsics	97	17
nx_f32_hw_matmul.nx	HARDWARE-float GEMM (the rung above the software nx_f32_matmul).	67	4
nx_f32_hw_matmul_curve.nx	diagnose the matmul bottleneck (compute- vs memory-bound).	56	3
nx_f32_hw_matmul_gate.nx	proves the hardware-float GEMM is correct.	94	4
nx_f32_hw_matmul_mac4.nx	ILP matmul: 4 independent accumulators hide the addss latency.	97	3
nx_f32_hw_matmul_perf.nx	MEASURED head-to-head: software vs hardware f32 GEMM (both sovereign).	58	3
nx_f32_image_to_bmp.nx	sovereign 24-bit BMP writer: f32 CHW RGB [0,1] -> a Windows-viewable .bmp file.	128	3
nx_f32_intrin_matmul.nx	is the matmul bottleneck CALL OVERHEAD (wrapper) vs the inline intrinsic?	103	4
nx_f32_kv_cache.nx	bits-up f32 KV cache substrate.	162	8
nx_f32_kv_cache_test.nx	smoke for nx_f32_kv_cache.nx.	118	1
nx_f32_layernorm.nx	clean importable flat-array software-f32 LayerNorm (per-row normalize over `dim`, then	34	1
nx_f32_layernorm_gate.nx		134	9
nx_f32_layernorm_lib_gate.nx	proof of the flat LayerNorm vs hand-computed values + affine + 2-row. expect_exit: 0	55	3
nx_f32_lazy_weight.nx	format-tagged weight tensor + matmul dispatcher.	886	30
nx_f32_lazy_weight_test.nx	smoke for nx_f32_lazy_weight.nx.	129	2
nx_f32_linear_attention.nx	sovereign O(n) linear attention (SANA-style), the DiT VRAM/speed lever.	103	4
nx_f32_linear_simd.nx	SIMD f32 linear (__f32x8_dot) for the SANA-DiT projections, vs scalar: verify+speed.	130	4
nx_f32_llama_block.nx	bits-up Llama-class transformer block	238	3
nx_f32_llama_block_test.nx	smoke for nx_f32_llama_block.nx.	129	1
nx_f32_llama_block_v4.nx	per-layer forward with lazy weights.	389	12
nx_f32_llama_block_v4_test.nx	smoke for nx_f32_llama_block_v4.nx.	101	1
nx_f32_llama_layer_lazy_load.nx	bind one layer's 9 tensors into	323	5
nx_f32_llama_layer_lazy_load_test.nx	smoke for the lazy-aware	68	1
nx_f32_llama_layer_load.nx	bind one layer's 9 GGUF tensors into NxF32LlamaLayer.	192	4
nx_f32_llama_layer_load_test.nx	smoke for nx_f32_llama_layer_load.nx.	68	1
nx_f32_llama_stack.nx	multi-block transformer stack forward.	121	2
nx_f32_llama_stack_test.nx	smoke for nx_f32_llama_stack.nx.	120	2
nx_f32_llama_stack_v4.nx	N-layer transformer stack using v4 lazy layers.	96	2
nx_f32_llama_stack_v4_test.nx	smoke for v4 stack.	103	2
nx_f32_llama_v4b.nx	BATCHED MULTI-SEQUENCE decode twins: one forward	344	3
nx_f32_llama_v4p.nx	PAGED-KV twins of the v4 forward chain: block /	348	3
nx_f32_llm.nx	full Llama-class model forward pass.	158	4
nx_f32_llm_bench_test.nx	parked LIVE-FIRE perf harness for real Qwen2.5.	177	2
nx_f32_llm_chat_test.nx	SOVEREIGN CHAT HARNESS: the decisive coherence test. Qwen2.5-Instruct is trained	128	5
nx_f32_llm_cohere_test.nx	SOVEREIGN COHERENCE HARNESS: the tool that answers "is the engine actually	118	3
nx_f32_llm_diag_test.nx	enumerate all tensor ggml_types in	137	2
nx_f32_llm_dim_dump_test.nx	dump attn_k.weight tensor dimensions	101	2
nx_f32_llm_e2e_test.nx	end-to-end bits-up text-to-text smoke.	105	1
nx_f32_llm_embed_diag_test.nx	check Q5_0-dequanted embed values	95	1
nx_f32_llm_live_dims_test.nx	LIVE FIRE on the real Qwen2.5-0.5B-Instruct.	62	1
nx_f32_llm_live_gen_test.nx	LIVE-FIRE TEXT GENERATION from real	116	1
nx_f32_llm_live_load_only_test.nx	LIVE-FIRE structural load	85	1
nx_f32_llm_live_load_test.nx	LIVE-FIRE structural proof.	145	1
nx_f32_llm_load.nx	model-level GGUF binder.	129	2
nx_f32_llm_load_test.nx	smoke for nx_f32_llm_load.nx.	92	1
nx_f32_llm_probe.nx	SOVEREIGN FORWARD PROBE: the tool that turns "why is the LLM forward garbage?"	167	5
nx_f32_llm_read_dims.nx	read model dims from GGUF metadata.	236	5
nx_f32_llm_read_dims_test.nx	smoke for nx_f32_llm_read_dims.nx.	169	3
nx_f32_llm_run.nx	autoregressive generation loop runner.	155	2
nx_f32_llm_run_test.nx	smoke for nx_f32_llm_run.nx.	111	1
nx_f32_llm_run_v2.nx	production runner with full sampler config.	215	5
nx_f32_llm_run_v2_test.nx	smoke for nx_f32_llm_run_v2.nx.	103	1
nx_f32_llm_run_v3.nx	lazy-aware autoregressive runner.	189	4
nx_f32_llm_run_v3_test.nx	smoke for lazy runner v3.	63	1
nx_f32_llm_serve.nx	the SOVEREIGN LLM generation SEAT. Loads real Qwen2.5-0.5B GGUF ONCE at startup, binds	351	12
nx_f32_llm_special_tokens.nx	read BOS/EOS/PAD token ids from GGUF.	74	4
nx_f32_llm_special_tokens_test.nx	smoke for nx_f32_llm_special_tokens.nx.	102	2
nx_f32_llm_test.nx	smoke for nx_f32_llm.nx.	152	2
nx_f32_llm_v4.nx	lazy-aware model binder + LLM forward.	288	5
nx_f32_llm_v4_test.nx	smoke for the lazy LLM forward.	89	1
nx_f32_lm_train_gate.nx		132	10
nx_f32_log.nx	IEEE 754 binary32 natural-log log(x) bits-up.	110	1
nx_f32_log_test.nx	smoke for nx_f32_log.nx.	60	2
nx_f32_lora_linear.nx	sovereign LoRA-adapted linear (the Aligned-LoRA / fine-tune-fewer-images lever).	98	3
nx_f32_matmul.nx	bits-up f32 dot product + GEMM kernel.	78	3
nx_f32_matmul_gate.nx	KAT proving the SOVEREIGN f32 GEMM is correct (the math-axis foothold).	91	6
nx_f32_matmul_perf.nx	MEASURE the sovereign f32 GEMM's throughput (the math-perf rung).	64	4
nx_f32_matmul_t.nx	matmul where B is laid out per ggml convention (B[k,j] at B[k + j*K]).	242	7
nx_f32_matmul_t_test.nx	KAT for column-major-B matmul.	45	1
nx_f32_matmul_test.nx	smoke for nx_f32_matmul.nx.	102	2
nx_f32_maxpool2d.nx	software-f32 2D max-pooling (NCHW), a STANDARD vision op the f32 tower lacked. Almost every	61	1
nx_f32_maxpool2d_gate.nx	exact proof of nx_f32_maxpool2d on an integer-f32 4x4 map. expect_exit: 0	52	3
nx_f32_mha.nx	bits-up f32 multi-head attention with GQA.	144	2
nx_f32_mha_multi.nx	bits-up f32 multi-head + multi-token attention.	140	2
nx_f32_mha_multi_test.nx	smoke for nx_f32_mha_multi.nx.	91	1
nx_f32_mha_test.nx	smoke for nx_f32_mha.nx.	92	1
nx_f32_miniqwen_train_gate.nx		258	14
nx_f32_moe_train_gate.nx		257	22
nx_f32_parity.nx	differential-parity measurement organ: the MEASURED-EXCEED engine for the	70	2
nx_f32_q14_encode_test.nx	KAT gate for f32_from_q14, the EXACT Q14->IEEE-754	75	6
nx_f32_q4k_matmul.nx	lazy-dequant matmul, B is Q4_K bytes. C[m,n] = A[m,k] @ dequant(B[k,n]).	716	24
nx_f32_q4k_matmul_test.nx	smoke for nx_f32_q4k_matmul.nx.	141	3
nx_f32_qwen2_train_gate.nx		324	29
nx_f32_qwen_capital_gate.nx	LIVE-FIRE TEXT GENERATION from real	119	1
nx_f32_qwen_encoder.nx	stack the sovereign Qwen layer into the FULL encoder forward.	233	3
nx_f32_qwen_layer.nx	a FULL sovereign f32 Qwen transformer layer (the Z-Image text-encoder + companion	244	6
nx_f32_raster_gate.nx	R4: the FIRST visible hardware-f32 3D artifact. Renders a rotated,	222	13
nx_f32_rectflow_denoise.nx	software-f32 rectified-flow (flow-matching) Euler denoise loop.	111	2
nx_f32_resblock.nx	software-f32 ResBlock (GroupNorm->SiLU->Conv 3x3, twice, + residual), R3/R7 rung.	102	3
nx_f32_rmsnorm.nx	bits-up f32 RMSNorm.	86	2
nx_f32_rmsnorm_rope_gate.nx		133	12
nx_f32_rmsnorm_test.nx	smoke for nx_f32_rmsnorm.nx.	87	2
nx_f32_rope.nx	bits-up f32 RoPE (Rotary Position Embedding).	186	5
nx_f32_rope_test.nx	smoke for nx_f32_rope.nx.	80	2
nx_f32_sampler.nx	temperature + top-k sampler for LLM logits.	344	9
nx_f32_sampler_test.nx	smoke for nx_f32_sampler.nx.	185	1
nx_f32_sincos.nx	IEEE 754 binary32 sin(x) + cos(x) bits-up.	191	7
nx_f32_sincos_test.nx	smoke for nx_f32_sincos.nx.	50	2
nx_f32_softmax.nx	bits-up f32 numerically-stable softmax.	87	3
nx_f32_softmax_gate.nx		123	11
nx_f32_softmax_test.nx	smoke for nx_f32_softmax.nx.	74	2
nx_f32_sse_kat_gate.nx	SOVEREIGN hardware IEEE-754 f32 scalar run-KAT: the	156	7
nx_f32_swiglu_gate.nx		87	9
nx_f32_test.nx	smoke + IEEE 754 conformance for nx_f32.nx.	161	1
nx_f32_train_ckpt_gate.nx		173	19
nx_f32_train_ops.nx	the small reusable software-f32 TRAINING ops that close the conv training loop, composing	47	4
nx_f32_transformer.nx	bits-up f32 Llama-class transformer block	189	2
nx_f32_transformer_test.nx	integration smoke.	101	1
nx_f32_transformer_train_gate.nx		153	15
nx_f32_upsample.nx	software-f32 nearest-neighbour Nx upsample (NCHW), VAE-decode brick.	75	2
nx_f32_upsample_bilinear.nx	software-f32 BILINEAR upsample (NCHW, integer scale, align_corners=FALSE to match	80	1
nx_f32_upsample_bilinear_gate.nx	exact proof of bilinear upsample (align_corners=False) vs hand-computed	48	3
nx_f32_vae_decode_tiny.nx	first end-to-end sovereign f32 VAE-DECODE (latent -> RGB), the R4/R7	118	3
nx_f32_vec_gate.nx	KAT for the hardware-f32 vec3 PART (R3), built + run through the	61	1
nx_f32_voxel_gate.nx	R4b/R4c: a PERSPECTIVE, TEXTURED, Z-BUFFERED procedural voxel LANDSCAPE on the	260	22