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nx_f32_hw_matmul.nx

buildroot/runtime/_hdl_build/nx_f32_hw_matmul.nx

2979 B67 linesdepth 2pulls 3 transitivereach 5 importersview sourcekind tooltopic f32

docs dependencies structs consts functions

about

nx_f32_hw_matmul.nx -- HARDWARE-float GEMM (the rung above the software nx_f32_matmul). module: nishi-core.genealogy.f32_hw_matmul capability: CORE_COMPUTE (escape the math perf lock via the SSE hardware-float rung) Same GEMM as nx_f32_matmul, but the inner MAC uses nx_f32_hw's f32_add/f32_mul -- which compile to SSE addss/mulss on the real FPU (rung A, nx_f32_sse_kat_gate GREEN) -- instead of the bits-up SOFTWARE f32. binary32 layout is identical, so results are bit-for-bit cross-checkable against the software matmul (the gate's differential). This is the measured lever for the math/simd lock. Sovereign: imports nx_f32_hw (-> __f32_* SSE intrinsics) + nx_syscalls. license_tier: ORIGINAL

dependencies 2 imports · 5 importers

imports: nx_f32_hw.nxnx_syscalls.nx

imported by: nx_f32_hw_matmul_curve.nxnx_f32_hw_matmul_gate.nxnx_f32_hw_matmul_mac4.nxnx_f32_hw_matmul_perf.nxnx_f32_intrin_matmul.nx

call flow from main pre-order; caps 40 nodes / depth 6 declared; ↻ = already shown

structs

none

consts

14	const NX_HWMM_OK: i64 = 0
15	const NX_HWMM_ERR: i64 = 1

functions

17	func hmm_puts(s: *u8) -> i64 { var n: i64 = 0; while s[n] != 0 as u8 { n = n + 1 } sys_write(1, s, n); return 0 } called by 9: main run main hg_row main main+3 calls 1: sys_write
18	func hmm_putn(v: i64) -> i64 called by 5: main run main run_pair main calls 2: sys_write sys_mmap
30	func nx_f32_hw_matmul(a: i64, b: i64, c: *i64, m: i64, k: i64, n: i64) -> i64 called by 7: main time_hw main mac4_time main time_mm+1
55	func main() -> i64 calls 7: hmm_puts sys_mmap f32_of nx_f32_hw_matmul hmm_putn f32_int+1