nx_f32_sse_kat_gate.nx

nx_f32_sse_kat_gate.nx -- SOVEREIGN hardware IEEE-754 f32 scalar run-KAT: the FIRST rung of the CPU+GPU 3D stack, proving REAL single-precision float on the x86 FPU (xmm) end to end (NO gcc / NO qemu / NO binutils). AUTHOR=ORGAN, no-false-green. Why this rung: fx.nx states "NishiLang has no float type today" -- all prior "f32" was fixed-point or soft-float emulated in i64, never the CPU's float ALU. The sovereign x86 game/render stack must run on the actual hardware (CPU SSE float now; GPU f32 next). This gate proves the sovereign assembler now EMITS and the silicon EXECUTES scalar-single ops that an integer-only path CANNOT fake. It assembles four tiny programs with the team's own _offc/nxasm_x86_main.elf and EXECUTES the resulting ELFs (exit code = the computed integer): P0: (3.0+4.0)*5.0 = 35.0 -> cvtss2si -> exit 35 (addss+mulss on the FPU) P1: (3.0+4.0)*6.0 = 42.0 -> cvtss2si -> exit 42 (neg control: different operand, different correct result) P2: 7.0/2.0 = 3.5 -> cvtss2si -> exit 4 (divss + round-half-to-EVEN: real IEEE rounding) P3: 7.0/2.0 = 3.5 -> cvttss2si-> exit 3 (truncate toward zero) GREEN iff p0==35 && p1==42 && p2==4 && p3==3 && p0!=p1 && p2!=p3. The p2!=p3 pair is the killer: ONE 3.5 value converts to 4 (round) and 3 (truncate) ONLY if real hardware IEEE-754 semantics are engaged -- an integer fake cannot produce both. Run-proves SEVEN encoder forms: cvtsi2ss, addss, mulss, divss, cvtss2si, cvttss2si (+ the REX.W encoder twin x86_sse_rr_w). Writes knowledge/status/f32_sse_kat.log. license_tier: ORIGINAL Reuses the run/assemble spine from nx_simd_sse_kat_gate.