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nx_f32_lora_linear.nx

buildroot/runtime/nx_f32_lora_linear.nx

3801 B98 linesdepth 4pulls 6 transitivereach 0 importersview sourcekind tooltopic f32
docsdependenciesstructsconstsfunctions

about

nx_f32_lora_linear.nx -- sovereign LoRA-adapted linear (the Aligned-LoRA / fine-tune-fewer-images lever). From DiT-IC's "Aligned LoRA Adaptation" (ingested 2026-07-01): fine-tune a frozen weight W [out,in] with a low-rank adapter B [out,r], A [r,in] (r << in,out). Forward: out = W x + B (A x). Only r*(in+out) params train instead of in*out -> huge param/VRAM/data saving (the "fewer images, faster training" lever), and LoRA merges into W for zero-overhead inference. Gate: LoRA forward == (W + B@A) x within f32 tolerance. license_tier: ORIGINAL

dependencies 4 imports · 0 importers

nx_syscalls.nx nx_f32.nx nx_f32_div.nx nx_f32_cvt.nx nx_f32_lora_linear.nx

imports: nx_syscalls.nxnx_f32.nxnx_f32_div.nxnx_f32_cvt.nx

imported by: nobody (leaf or entry point)

call flow from main pre-order; caps 40 nodes / depth 6 declared; ↻ = already shown

main sys_mmap nx_i32_to_f32 nx_f32_div nx_f32_classify nx_f32_exp_field nx_f32_mant_field nx_f32_sign nx_f32_mant_field ↻ nx_f32_exp_field ↻ nx_f32_lora_forward nx_f32_add nx_f32_classify ↻ nx_f32_sign ↻ nx_f32_mant_field ↻ nx_f32_exp_field ↻ nx_f32_mul nx_f32_classify ↻ nx_f32_sign ↻ nx_f32_mant_field ↻ nx_f32_exp_field ↻ nx_f32_add ↻ nx_f32_mul ↻ lo_close nx_f32_mul ↻ nx_f32_sub nx_f32_add ↻ nx_f32_neg nx_f32_sub ↻

structs

none

consts

12const K_MAGIC_100000: i64 = 100000

functions

15func nx_f32_lora_forward(W: *i64, B: *i64, A: *i64, x: *i64, in_dim: i64, out_dim: i64, rank: i64,
called by 1: main calls 2: nx_f32_addnx_f32_mul
41func lo_close(x: i64, e: i64, tol: i64) -> i64
called by 1: main calls 2: nx_f32_mulnx_f32_sub
49func main() -> i64