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nx_f32_kv_cache.nx

buildroot/runtime/nx_f32_kv_cache.nx

5969 B162 linesdepth 2pulls 2 transitivereach 72 importersview sourcekind librarytopic f32
docsdependenciesstructsconstsfunctions

about

nx_f32_kv_cache.nx -- bits-up f32 KV cache substrate. L7 / L8 composition brick. Closes the autoregressive-decode O(n^2) → O(n) gap: instead of recomputing K/V from the prompt every step, cache them per layer and only project the new token. Cache layout (linear i64 arrays of f32 bits): cache_K: [n_layers, max_seq_len, kv_dim] row-major cache_V: [n_layers, max_seq_len, kv_dim] kv_dim = n_kv_heads * head_dim seq_len: scalar count of filled rows (advanced once per fwd pass) Per-layer append + advance pattern: For each layer L: 1. Project x -> K_new, V_new (caller does this) 2. nx_f32_kv_cache_append_layer(cache, L, K_new, V_new, n_new) copies K_new/V_new into cache_K[L, seq_len:seq_len+n_new, :] 3. Read K_all = nx_f32_kv_cache_get_K(cache, L) Read V_all = nx_f32_kv_cache_get_V(cache, L) Both are full pointers (caller uses seq_len + n_new rows) 4. Attention over those (n_new + cached) rows Once ALL layers done: nx_f32_kv_cache_advance(cache, n_new) Increments seq_len by n_new. Substrate-honest: this v1 stores f32 outputs (post-projection). Production KV caches sometimes use int8 or even Q4_K -- queued as v2 quantized-KV variant once a quant primitive lands. genealogy_id: standard_kv_cache_canon + decoder_lm_decode_pattern lineage_id: substrate_f32_kv_cache_v1

dependencies 2 imports · 56 importers

nx_syscalls.nx nx_tier.nx nx_f32_kv_cache.nx nx_batched_gate.nx nx_batched_tput.nx nx_chat_warmcache.nx nx_coder_gen_f32.nx nx_companion_chat.nx nx_companion_voice.nx nx_f32_attn_cached.nx nx_f32_attn_cached_test.nx nx_f32_kv_cache_test.nx nx_f32_llama_block.nx

diagram shows first 10 each side; +0 more imports, +46 more importers in the complete lists below.

imports: nx_syscalls.nxnx_tier.nx

imported by: nx_batched_gate.nxnx_batched_tput.nxnx_chat_warmcache.nxnx_coder_gen_f32.nxnx_companion_chat.nxnx_companion_voice.nxnx_f32_attn_cached.nxnx_f32_attn_cached_test.nxnx_f32_kv_cache_test.nxnx_f32_llama_block.nxnx_f32_llama_block_test.nxnx_f32_llama_block_v4.nxnx_f32_llama_block_v4_test.nxnx_f32_llama_stack.nxnx_f32_llama_stack_test.nxnx_f32_llama_stack_v4.nxnx_f32_llama_stack_v4_test.nxnx_f32_llm.nxnx_f32_llm_bench_test.nxnx_f32_llm_chat_test.nxnx_f32_llm_cohere_test.nxnx_f32_llm_e2e_test.nxnx_f32_llm_live_gen_test.nxnx_f32_llm_live_load_only_test.nxnx_f32_llm_live_load_test.nxnx_f32_llm_load_test.nxnx_f32_llm_probe.nxnx_f32_llm_run.nxnx_f32_llm_run_test.nxnx_f32_llm_run_v2.nxnx_f32_llm_run_v2_test.nxnx_f32_llm_run_v3.nxnx_f32_llm_run_v3_test.nxnx_f32_llm_serve.nxnx_f32_llm_test.nxnx_f32_llm_v4.nxnx_f32_llm_v4_test.nxnx_f32_qwen_capital_gate.nxnx_llm_argmax_probe.nxnx_llm_batch_serve.nxnx_llm_diff_probe.nxnx_llm_forward_profile.nxnx_llm_france_probe.nxnx_llm_layerlens_probe.nxnx_llm_sched_gate.nxnx_lowrank_kv_real.nxnx_paged_fwd_gate.nxnx_paged_kv_gate.nxnx_qwen_native_gate.nxnx_qwen_wsl_timing_gate.nxnx_reason_paged_probe.nxnx_reason_probe.nxnx_reasoning.nxnx_reasoning_gate.nxnx_specdec.nxnx_specdec_gate.nx

structs

48struct NxF32KVCache

consts

36const NX_F32_KVC_OK: nx_int = 0
37const NX_F32_KVC_ERR_BAD_DIM: nx_int = 1
38const NX_F32_KVC_ERR_OVERFLOW: nx_int = 2
39const NX_F32_KVC_ERR_BAD_LAYER: nx_int = 3
40const NX_F32_KVC_N_VERDICTS: nx_int = 4
58const NX_F32_KVC_STRUCT_BYTES: nx_int = 56 // 7 fields * 8

functions

42func nx_f32_kvc_verdict_is_valid(v: nx_int) -> nx_int
called by 1: main
62func nx_f32_kv_cache_alloc(n_layers: nx_int, n_kv_heads: nx_int,
called by 40: mainmainmainmainmainmain+34 calls 1: sys_mmap
86func nx_f32_kv_cache_reset(c: *NxF32KVCache) -> nx_int
92func nx_f32_kv_cache_get_seq_len(c: *NxF32KVCache) -> nx_int
99func nx_f32_kv_cache_get_K_layer(c: *NxF32KVCache, layer: nx_int) -> *i64
108func nx_f32_kv_cache_get_V_layer(c: *NxF32KVCache, layer: nx_int) -> *i64
122func nx_f32_kv_cache_append_layer(c: *NxF32KVCache, layer: nx_int,
154func nx_f32_kv_cache_advance(c: *NxF32KVCache, n_new: nx_int) -> nx_int