nx_wasm_threads_gate.nx

nx_wasm_threads_gate.nx -- LN33 / LN34 REFEREE (lang.plan): wasm threads from the sovereign compiler, ONE family. THE FAMILY IS THE INCUMBENT'S: the parser builtins __atomic_load_i64 / __atomic_store_i64 / __atomic_cas_i64 / __atomic_faa_i64 / __atomic_fence (nx_atom.nx wraps them) lower to OP_ATOMIC_* in the IR; the x86-64 backend lowers those to LOCK-prefixed instructions, the rv64 backend to AMO and lr/sc (LN34), and the wasm backend to the 0xFE family over a module-declared shared memory -- with __syscall(98 futex, addr, WAIT|WAKE, val) lowering to memory.atomic.wait32 / memory.atomic.notify. Under --nothreads the SAME ops lower to plain single-thread twins. SUBJECTS, forked by their SERVED name first: ./nx_compile_wat.elf (the WAT backend driver over nx_wasm.nx) and ./nx_wat_compiler.elf (WAT -> wasm); the VM twin nx_wasm_vm is composed IN-PROCESS so its 0xFE semantics are measured here rather than trusted. FIXTURES are assembled at RUNTIME under the fixture dir (argv[1], default /tmp/nx_wasm_threads_gate) and use the builtins directly, so no library has to be copied beside them: a shared-declaring module, a plain module (the neutrality control), a shared-without-maximum module (the emitter must refuse by name), a hand-written WAT with a shared memory and no maximum (the WAT compiler must refuse by name), and the --nothreads twin of the shared module. THE BROWSER HALF of the done-rule -- two Workers over ONE shared WebAssembly.Memory behind real cross-origin isolation, the atomic counter exact and the plain-store twin losing updates -- lives on the CDP wire (nishi-ops/ac_cdp.py with AC_CDP_SERVE), because a gate on the NAS has no browser; its numbers are journaled on lang.plan LN33, and this gate proves everything BELOW the browser and says so in its verdict note. nx_wasm_threads_gate [fixture-dir] license_tier: ORIGINAL No hw writes (Rule 26).