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rvv_regname_test.nx

buildroot/runtime/rvv_regname_test.nx

3928 B107 linesdepth 6pulls 15 transitivereach 0 importersview sourcekind gate/proof
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rvv_regname_test.nx -- reg_name + vbinop lowering dispatch. Exercises the RVV branch added to reg_name() AND the vadd.vv / vfadd.vv emission from rv_emit_vbinop. Full vector codegen lands when the IR + allocator are wired end-to-end; for now this confirms the naming + mnemonic surface is correct.

dependencies 6 imports · 0 importers

syscalls.nx types.nx ir.nx outbuf.nx regalloc.nx riscv.nx rvv_regname_test.nx

imports: syscalls.nxtypes.nxir.nxoutbuf.nxregalloc.nxriscv.nx

imported by: nobody (leaf or entry point)

structs

none

consts

none

functions

15func buf_contains(buf: *u8, n: i64, needle: *u8) -> i64 {
33func main() -> i64 {