sketch_hll4_vs_hll8_bench.nx

sketch_hll4_vs_hll8_bench.nx -- memory-efficiency paired bench. CLAIM TO VALIDATE: HLL_4 (4-bit registers + Heule exception table) achieves the SAME cardinality accuracy as HLL_8 (8-bit registers) at ~50% memory for the typical case where < ~10% of registers hit rho > 14 (the value beyond which the 4-bit register saturates and the exception table records the actual rho). Apache DataSketches HLL_4_12 documents the same claim; substrate matches. WORKLOAD: Stream 10000 distinct keys into both at lg_k=10 (m=1024 regs). MEMORY: HLL_8 (lg_k=10): m=1024 bytes regs + header = ~1048 B HLL_4 (lg_k=10): m/2=512 bytes regs + exception table overhead. For 10k stream at lg_k=10, ~few exceptions expected -> ~512 + ~8*16 (initial except cap) = ~640 B. ~38% reduction. HARD-WIN GATE: MEMORY: HLL_4 bytes < HLL_8 bytes by >25%. ACCURACY: both estimates within 15% of truth=10000.