sketch_hll_packed_vs_hll8_bench.nx

sketch_hll_packed_vs_hll8_bench.nx -- 6-bit register memory bench. CLAIM TO VALIDATE: HLL_packed uses 6-bit registers (rho values cap at 63, more than enough for cardinalities up to 2^63). 6/8 = 25% memory reduction vs HLL_8. No exception table needed -- 6 bits suffices unlike HLL_4's 4 bits. Cleaner trade-off than HLL_4 (no exception path). WORKLOAD: Stream 10000 distinct keys at lg_k=10 into both. MEMORY: HLL_8 (lg_k=10): 1024 bytes regs + 32 header = 1056 B HLL_packed (lg_k=10): ceil(1024 * 6 / 8) = 768 bytes regs + 40 header = 808 B Reduction: ~23%.