code wiki / _hdl_build / nx_ad_emit.nx
nx_ad_emit.nx source
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1// nx_ad_emit.nx -- ACCESSED/DIRTY bit tracking (Sv39 A/D, X-PAGE-AD-001). The demand-paging foundation:
2// the hardware sets the leaf PTE's Accessed bit (6) on ANY access and the Dirty bit (7) on a STORE, so
3// the OS can drive page replacement (evict un-accessed pages) + dirty write-back (flush only D=1 pages).
4// The PTE starts A=0,D=0; an S-mode load (sets A) then store (sets D) to the page; an ecall to the M-mode
5// kernel, which reads the leaf PTE PHYSICALLY (M-mode identity) and confirms A=1 && D=1 -> "ADOK".
6// do_access (argv[1]) -- default 1. The gate's control passes 0 (NO access) -> A/D stay 0 -> "ADN",
7// proving the bits are SET BY THE ACCESS, not pre-set. out-path (argv[2]).
8// Sovereign, no gcc/.sh. license_tier: ORIGINAL
9import "nx_syscalls.nx"
10const AD_MAGIC_8192: i64 = 8192
11
12const AD_OUT: *u8 = "runtime/_hdl_build/_ad_virt.bin"
13const AD_GOLD: *u8 = "runtime/_hdl_build/_ad_virt.bin.gold"
14const AD_LOG: *u8 = "knowledge/status/paging.log"
15
16const AD_UART: i64 = 0x10000000
17const AD_FIN: i64 = 0x100000
18const AD_PASS: i64 = 0x5555
19const AD_MEM_BASE: i64 = 0x80000000
20const AD_CSR_SATP: i64 = 0x180
21const AD_CSR_MSTATUS: i64 = 0x300
22const AD_CSR_MTVEC: i64 = 0x305
23const AD_CSR_MEPC: i64 = 0x341
24const AD_MRET: i64 = 0x30200073
25const AD_ECALL: i64 = 0x00000073
26const AD_MPP_S: i64 = 0x800
27
28const RV_X0: i64 = 0
29const RV_T0: i64 = 5
30const RV_T1: i64 = 6
31const RV_T2: i64 = 7
32const RV_T3: i64 = 28
33const RV_T5: i64 = 30
34
35const AD_PTE_ADDR: i64 = 0x80008000
36const AD_DATA_PTE_PHYS: i64 = 0x80008018 // root[VPN2=3] -- the data leaf the handler inspects
37const AD_CODE_PTE: i64 = 0x2000000F // root[VPN2=2] identity code (V|R|W|X)
38const AD_DATA_PTE: i64 = 0x20000007 // root[VPN2=3] data gigapage (V|R|W, A=0 D=0)
39const AD_SENT_PA: i64 = 0x80009000
40const AD_SENT_VAL: i64 = 0x5ECA1234
41const AD_VA: i64 = 0xC0009000
42const AD_SATP_PPN: i64 = 0x80008
43const AD_SV39: i64 = 8
44
45func ad_lui(rd: i64, imm20: i64) -> i64 { return ((imm20 & 0xFFFFF) << 12) | (rd << 7) | 0x37 }
46func ad_addi(rd: i64, rs1: i64, imm: i64) -> i64 { return ((imm & 0xFFF) << 20) | (rs1 << 15) | (rd << 7) | 0x13 }
47func ad_andi(rd: i64, rs1: i64, imm: i64) -> i64 { return ((imm & 0xFFF) << 20) | (rs1 << 15) | (7 << 12) | (rd << 7) | 0x13 }
48func ad_load(rd: i64, rs1: i64, f3: i64, imm: i64) -> i64 { return ((imm & 0xFFF) << 20) | (rs1 << 15) | (f3 << 12) | (rd << 7) | 0x03 }
49func ad_store(rs2: i64, rs1: i64, f3: i64, imm: i64) -> i64 {
50 let hi: i64 = ((imm >> 5) & 0x7f) << 25
51 let lo: i64 = (imm & 0x1f) << 7
52 return hi | (rs2 << 20) | (rs1 << 15) | (f3 << 12) | lo | 0x23
53}
54func ad_branch(rs1: i64, rs2: i64, f3: i64, imm: i64) -> i64 {
55 let b12: i64 = ((imm >> 12) & 0x1) << 31
56 let b11: i64 = ((imm >> 11) & 0x1) << 7
57 let b10_5: i64 = ((imm >> 5) & 0x3f) << 25
58 let b4_1: i64 = ((imm >> 1) & 0xf) << 8
59 return b12 | b10_5 | (rs2 << 20) | (rs1 << 15) | (f3 << 12) | b4_1 | b11 | 0x63
60}
61func ad_jal(rd: i64, imm: i64) -> i64 {
62 let b20: i64 = ((imm >> 20) & 0x1) << 31
63 let b19_12: i64 = ((imm >> 12) & 0xff) << 12
64 let b11: i64 = ((imm >> 11) & 0x1) << 20
65 let b10_1: i64 = ((imm >> 1) & 0x3ff) << 21
66 return b20 | b10_1 | b11 | b19_12 | (rd << 7) | 0x6f
67}
68func ad_slli(rd: i64, rs1: i64, shamt: i64) -> i64 { return ((shamt & 0x3f) << 20) | (rs1 << 15) | (1 << 12) | (rd << 7) | 0x13 }
69func ad_srli(rd: i64, rs1: i64, shamt: i64) -> i64 { return ((shamt & 0x3f) << 20) | (rs1 << 15) | (5 << 12) | (rd << 7) | 0x13 }
70func ad_or(rd: i64, rs1: i64, rs2: i64) -> i64 { return (rs2 << 20) | (rs1 << 15) | (6 << 12) | (rd << 7) | 0x33 }
71func ad_csrrw(rd: i64, csr: i64, rs1: i64) -> i64 { return ((csr & 0xfff) << 20) | (rs1 << 15) | (1 << 12) | (rd << 7) | 0x73 }
72func ad_w32(buf: *u8, off: i64, w: i64) -> i64 { buf[off]=(w&0xff) as u8; buf[off+1]=((w>>8)&0xff) as u8; buf[off+2]=((w>>16)&0xff) as u8; buf[off+3]=((w>>24)&0xff) as u8; return off+4 }
73func ad_li32(buf: *u8, off: i64, rd: i64, val: i64) -> i64 {
74 var hi: i64 = (val >> 12) & 0xFFFFF
75 var lo: i64 = val & 0xFFF
76 if lo >= 0x800 { lo = lo - 0x1000; hi = (hi + 1) & 0xFFFFF }
77 var o: i64 = ad_w32(buf, off, ad_lui(rd, hi))
78 o = ad_w32(buf, o, ad_addi(rd, rd, lo))
79 return o
80}
81func ad_li32u(buf: *u8, off: i64, rd: i64, val: i64) -> i64 {
82 var o: i64 = ad_li32(buf, off, rd, val)
83 o = ad_w32(buf, o, ad_slli(rd, rd, 32))
84 o = ad_w32(buf, o, ad_srli(rd, rd, 32))
85 return o
86}
87func ad_emit_str(buf: *u8, off: i64, s: *u8, n: i64) -> i64 {
88 var o: i64 = off
89 var i: i64 = 0
90 while i < n { o = ad_w32(buf, o, ad_addi(RV_T1, RV_X0, s[i] as i64)); o = ad_w32(buf, o, ad_store(RV_T1, RV_T0, 0, 0)); i = i + 1 }
91 return o
92}
93func ad_p(s: *u8) -> i64 { var n: i64=0; while s[n]!=(0 as u8){n=n+1} sys_write(1,s,n); return 0 }
94func ad_fn(fd: i64, v: i64) -> i64 { let bb: *u8=sys_mmap(28); var m: i64=v; if m<0{m=0-m}; let t: *u8=sys_mmap(28); var k: i64=0; if m==0{t[0]=48;k=1}; while m>0{t[k]=(48+(m%10)) as u8;m=m/10;k=k+1}; var i: i64=0; while i<k{bb[i]=t[k-1-i];i=i+1}; sys_write(fd,bb,k); return 0 }
95
96// pos_out[0]=CONT (S-mode), [1]=HANDLER (M-mode), [2]=ADN, [3]=HALT
97func ad_emit_image(buf: *u8, cont_off: i64, handler_off: i64, adn_off: i64, halt_off: i64, pos_out: *i64, do_access: i64) -> i64 {
98 var o: i64 = 0
99 o = ad_w32(buf, o, ad_lui(RV_T0, AD_UART >> 12)) // t0 = UART
100 o = ad_li32u(buf, o, RV_T1, AD_MEM_BASE + handler_off) // mtvec = &handler
101 o = ad_w32(buf, o, ad_csrrw(RV_X0, AD_CSR_MTVEC, RV_T1))
102 o = ad_li32u(buf, o, RV_T5, AD_PTE_ADDR) // page table
103 o = ad_li32(buf, o, RV_T1, AD_CODE_PTE); o = ad_w32(buf, o, ad_store(RV_T1, RV_T5, 2, 0x10)) // root[2] identity code
104 o = ad_li32(buf, o, RV_T1, AD_DATA_PTE); o = ad_w32(buf, o, ad_store(RV_T1, RV_T5, 2, 0x18)) // root[3] data leaf A=0 D=0
105 o = ad_li32u(buf, o, RV_T5, AD_SENT_PA); o = ad_li32(buf, o, RV_T1, AD_SENT_VAL); o = ad_w32(buf, o, ad_store(RV_T1, RV_T5, 2, 0))
106 o = ad_li32(buf, o, RV_T1, AD_SATP_PPN) // satp = Sv39|PPN
107 o = ad_w32(buf, o, ad_addi(RV_T2, RV_X0, AD_SV39))
108 o = ad_w32(buf, o, ad_slli(RV_T2, RV_T2, 60))
109 o = ad_w32(buf, o, ad_or(RV_T1, RV_T1, RV_T2))
110 o = ad_w32(buf, o, ad_csrrw(RV_X0, AD_CSR_SATP, RV_T1))
111 o = ad_li32u(buf, o, RV_T1, AD_MEM_BASE + cont_off) // mepc = &cont (S-mode)
112 o = ad_w32(buf, o, ad_csrrw(RV_X0, AD_CSR_MEPC, RV_T1))
113 o = ad_li32(buf, o, RV_T1, AD_MPP_S)
114 o = ad_w32(buf, o, ad_csrrw(RV_X0, AD_CSR_MSTATUS, RV_T1))
115 o = ad_w32(buf, o, AD_MRET)
116 pos_out[0] = o // CONT (S-mode)
117 if do_access == 1 {
118 o = ad_li32u(buf, o, RV_T5, AD_VA)
119 o = ad_w32(buf, o, ad_load(RV_T3, RV_T5, 2, 0)) // lw -> sets A
120 o = ad_w32(buf, o, ad_store(RV_T3, RV_T5, 2, 0)) // sw -> sets D
121 }
122 o = ad_w32(buf, o, AD_ECALL) // -> M-mode handler
123 o = ad_w32(buf, o, ad_jal(RV_X0, halt_off - o)) // (dead)
124 pos_out[1] = o // HANDLER (M-mode)
125 o = ad_li32u(buf, o, RV_T5, AD_DATA_PTE_PHYS) // read the data leaf PTE physically
126 o = ad_w32(buf, o, ad_load(RV_T3, RV_T5, 3, 0)) // ld t3, PTE (64-bit)
127 o = ad_w32(buf, o, ad_andi(RV_T1, RV_T3, 0x40)) // A bit
128 let pca: i64 = o
129 o = ad_w32(buf, o, ad_branch(RV_T1, RV_X0, 0, adn_off - pca)) // beq A,0 -> ADN
130 o = ad_w32(buf, o, ad_andi(RV_T1, RV_T3, 0x80)) // D bit
131 let pcd: i64 = o
132 o = ad_w32(buf, o, ad_branch(RV_T1, RV_X0, 0, adn_off - pcd)) // beq D,0 -> ADN
133 o = ad_emit_str(buf, o, "ADOK" as *u8, 4) // A=1 && D=1 (set by the access)
134 o = ad_w32(buf, o, ad_jal(RV_X0, halt_off - o))
135 pos_out[2] = o // ADN (A or D not set)
136 o = ad_emit_str(buf, o, "ADN" as *u8, 3)
137 pos_out[3] = o // HALT
138 o = ad_li32(buf, o, RV_T5, AD_FIN)
139 o = ad_li32(buf, o, RV_T1, AD_PASS)
140 o = ad_w32(buf, o, ad_store(RV_T1, RV_T5, 2, 0))
141 o = ad_w32(buf, o, ad_jal(RV_X0, 0))
142 return o
143}
144
145func ad_parse_num(s: *u8) -> i64 {
146 var q: i64 = 0; var val: i64 = 0
147 if s[0] == (48 as u8) { if s[1] == (120 as u8) {
148 q = 2
149 var go: i64 = 1
150 while go == 1 { let c: i64 = s[q] as i64; var d: i64 = 0-1; if c>=48 { if c<=57 { d=c-48 } } if c>=97 { if c<=102 { d=c-87 } } if c>=65 { if c<=70 { d=c-55 } } if d<0 { go=0 } else { val=val*16+d; q=q+1 } }
151 return val
152 }}
153 var go2: i64 = 1
154 while go2 == 1 { let c: i64 = s[q] as i64; if c>=48 { if c<=57 { val=val*10+(c-48); q=q+1 } else { go2=0 } } else { go2=0 } }
155 return val
156}
157
158func main(argc: i64, argv: *i64) -> i64 {
159 var do_access: i64 = 1
160 var outp: *u8 = AD_OUT
161 if argc >= 2 { do_access = ad_parse_num(argv[1] as *u8) }
162 if argc >= 3 { outp = argv[2] as *u8 }
163 let scratch: *u8 = sys_mmap(AD_MAGIC_8192)
164 let pos: *i64 = sys_mmap(40) as *i64
165 ad_emit_image(scratch, 0, 0, 0, 0, pos, do_access)
166 let cont_off: i64 = pos[0]
167 let handler_off: i64 = pos[1]
168 let adn_off: i64 = pos[2]
169 let halt_off: i64 = pos[3]
170 let buf: *u8 = sys_mmap(AD_MAGIC_8192)
171 let sz: i64 = ad_emit_image(buf, cont_off, handler_off, adn_off, halt_off, pos, do_access)
172 let fd: i64 = sys_openat_wr(outp, 420)
173 if fd < 0 { ad_p("ADEMIT verdict=RED reason=out-unwritable\n" as *u8); return 1 }
174 sys_write(fd, buf, sz); sys_close(fd)
175 let gold: *u8 = sys_mmap(8)
176 gold[0]=65 as u8; gold[1]=68 as u8; gold[2]=79 as u8; gold[3]=75 as u8 // "ADOK"
177 let gfd: i64 = sys_openat_wr(AD_GOLD, 420)
178 if gfd >= 0 { sys_write(gfd, gold, 4); sys_close(gfd) }
179 ad_p("ADEMIT name=" as *u8); ad_p(outp); ad_p(" bytes=" as *u8); ad_fn(1, sz); ad_p(" (Sv39 Accessed/Dirty bit tracking)\n" as *u8)
180 let lf: i64 = sys_openat_append(AD_LOG, 420)
181 if lf >= 0 { var n: i64=0; let m: *u8="ADEMIT authored _ad_virt.bin golden=ADOK\n" as *u8; while m[n]!=(0 as u8){n=n+1} sys_write(lf,m,n); sys_close(lf) }
182 return 0
183}