code wiki / _hdl_build / nx_asm_oracle.nx
nx_asm_oracle.nx source
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1// nx_asm_oracle.nx -- dumps my sovereign assembler's machine-code words for a fixed instruction sequence, so they can
2// be diffed against the GNU reference assembler (riscv64-linux-gnu-as) -- an EXTERNAL-ORACLE encoding validation of the
3// whole RV64IM encoder (esp. the just-added M extension). Prints one hex word per line. expect_exit: 0
4import "nx_syscalls.nx"
5import "nx_g_puts_lib.nx"
6import "nx_rv64_asm.nx"
7import "nx_rv64_fast.nx"
8
9func g_ph8(v: i64) -> i64 { let b: *u8=sys_mmap(12); var i: i64=7; while i>=0 { let nib: i64=(v>>(i*4))&15; if nib<10 { b[7-i]=(48+nib) as u8 } else { b[7-i]=(87+nib) as u8 } i=i-1 } b[8]=10 as u8; sys_write(1,b,9); return 0 }
10
11func main() -> i64 {
12 let code: *u8=sys_mmap(4096)
13 // EXACT same sequence + operands as scratchpad/rvref.s (GNU reference).
14 let src: *u8 = " mulw s0, t1, t1\n addw t0, t0, s0\n addiw t1, t1, 1\n subw t0, t1, t2\n slliw t0, t1, 3\n srliw t0, t1, 3\n sraiw t0, t1, 3\n divw a0, t0, t1\n remuw a1, t0, t1\n mul s0, t1, t1\n mulh a0, t0, t1\n mulhsu a2, t0, t1\n mulhu a1, t0, t1\n div a3, t0, t1\n divu a4, t0, t1\n rem a5, t0, t1\n remu a6, t0, t1\n add t0, t1, t2\n sub t0, t1, t2\n and t0, t1, t2\n or t0, t1, t2\n xor t0, t1, t2\n sll t0, t1, t2\n srl t0, t1, t2\n addi t0, t1, 5\n andi t0, t1, 7\n ori t0, t1, 7\n slli t0, t1, 3\n srli t0, t1, 3\n lw t0, 8(t1)\n ld t0, 16(t1)\n sw t0, 8(t1)\n sd t0, 16(t1)\n lui t0, 0x12345\n" as *u8
15 let nb: i64 = rvasm_assemble_str(src, code, 4096)
16 if nb < 0 { g_puts("ASSEMBLE FAILED\n" as *u8); sys_exit(1); return 1 }
17 let nw: i64 = nb/4
18 var i: i64=0
19 while i<nw { g_ph8(fk_w32(code, i*4)); i=i+1 }
20 sys_exit(0); return 0
21}