code wiki / _hdl_build / nx_assign_gen_test.nx

nx_assign_gen_test.nx source

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1// nx_assign_gen_test.nx -- ACCEPTANCE GATE for the research->assignments pipeline. Exact KATs, and a 2// DEMO generating the Arc D chip-fab backlog from the researcher's admitted facts (proving research 3// goes to a grounded, build-ordered, gap-flagged spec mechanically -- the part Claude wrote by hand). 4import "nx_assign_gen.nx" 5import "nx_syscalls.nx" 6 7func gt_puts(s: *u8) -> i64 { var n: i64=0; while s[n]!=(0 as u8){n=n+1} sys_write(1,s,n); return 0 } 8func gt_putn(v: i64) -> i64 { let bb: *u8=sys_mmap(28); var m: i64=v; if m<0{m=0-m;sys_write(1,"-" as *u8,1)} let t: *u8=sys_mmap(28); var k: i64=0; if m==0{t[0]=48 as u8;k=1} while m>0{t[k]=(48+(m%10)) as u8;m=m/10;k=k+1} var i: i64=0; while i<k{bb[i]=t[k-1-i];i=i+1} sys_write(1,bb,k); return 0 } 9 10func main() -> i64 { 11 var pass: i64 = 0 12 var total: i64 = 0 13 14 // T1: classify -- grounded+action=BUILD; 0-evidence=PURSUE(raised hand); grounded+no-action=BLOCKED 15 total = total + 1 16 var t1: i64 = 1 17 if ag_classify(3, 1) != AG_BUILD { t1 = 0 } 18 if ag_classify(0, 1) != AG_PURSUE { t1 = 0 } // 0 evidence -> never fabricated into a build 19 if ag_classify(2, 0) != AG_BLOCKED { t1 = 0 } // has evidence but action unknown -> design first 20 if t1 == 1 { pass = pass + 1 } else { gt_puts("T1 FAIL classify\n" as *u8) } 21 22 // ---- the Arc D chip-fab backlog, generated from the 8 chipfab research candidates ---- 23 // (corroboration counts mirror the researcher: 6 admitted >=2 src, 2 are gaps with 0) 24 let names: *i64 = sys_mmap(128) as *i64 25 let corr: *i64 = sys_mmap(128) as *i64 26 let act: *i64 = sys_mmap(128) as *i64 27 let lay: *i64 = sys_mmap(128) as *i64 28 let dep: *i64 = sys_mmap(128) as *i64 29 let dpd: *i64 = sys_mmap(128) as *i64 30 // 0: target the 5-10um litho node (research-grounded, L0, no dep) 31 names[0]=("D0 target 5-10um litho node (Zeloof/HackerFab floor)" as *u8) as i64; corr[0]=3; act[0]=1; lay[0]=0; dep[0]=0-1; dpd[0]=0 32 // 1: build the maskless-stepper CONTROL on the precision substrate (L1, depends on D0) 33 names[1]=("D1 maskless-stepper control on nx_micron_geom/nx_motion_plan" as *u8) as i64; corr[1]=2; act[1]=1; lay[1]=1; dep[1]=0; dpd[1]=1 34 // 2: GDSII mask geometry layer (L1, depends on D0) 35 names[2]=("D2 GDSII mask/pattern geometry" as *u8) as i64; corr[2]=2; act[2]=1; lay[2]=1; dep[2]=0; dpd[2]=1 36 // 3: process control (bake/anneal) via nx_heater_pid (L2, depends on D1) 37 names[3]=("D3 process thermal control (bake/anneal) via nx_heater_pid" as *u8) as i64; corr[3]=2; act[3]=1; lay[3]=2; dep[3]=1; dpd[3]=1 38 // 4: GAP -- total sovereign replication BOM in $ (0 evidence -> PURSUE) 39 names[4]=("D4 PURSUE replication BOM in dollars" as *u8) as i64; corr[4]=0; act[4]=0; lay[4]=0; dep[4]=0-1; dpd[4]=0 40 // 5: GAP -- consumable supply chain (0 evidence -> PURSUE) 41 names[5]=("D5 PURSUE consumable supply chain (wafers/resist/dopants)" as *u8) as i64; corr[5]=0; act[5]=0; lay[5]=0; dep[5]=0-1; dpd[5]=0 42 43 let N: i64 = 6 44 45 // T2: build-order monotonic (every dep at a strictly earlier rank) 46 total = total + 1 47 if ag_order_ok(lay, dpd, dep, N) == 1 { pass = pass + 1 } else { gt_puts("T2 FAIL order\n" as *u8) } 48 49 // T3: a FORWARD dependency is rejected (honesty: the gate catches a bad plan) 50 total = total + 1 51 let bad_dep: *i64 = sys_mmap(64) as *i64 52 var bi: i64 = 0 53 while bi < N { bad_dep[bi] = dep[bi]; bi = bi + 1 } 54 bad_dep[0] = 1 // D0 now depends on D1 (later/higher) -> forward dep 55 if ag_order_ok(lay, dpd, bad_dep, N) == 0 { pass = pass + 1 } else { gt_puts("T3 FAIL forward-dep not caught\n" as *u8) } 56 57 // T4: counts -- 4 BUILD (D0-D3 grounded+action), 2 PURSUE (D4,D5 gaps); grounded 4/6 = 666 permil 58 total = total + 1 59 var t4: i64 = 1 60 if ag_count_build(corr, act, N) != 4 { t4 = 0 } 61 if ss_count_gaps(corr, N) != 2 { t4 = 0 } // 2 raised hands surfaced 62 if ag_grounded_permil(corr, N) != 666 { t4 = 0 } 63 if t4 == 1 { pass = pass + 1 } else { gt_puts("T4 FAIL counts build=" as *u8); gt_putn(ag_count_build(corr,act,N)); gt_puts(" gaps=" as *u8); gt_putn(ss_count_gaps(corr,N)); gt_puts(" gr=" as *u8); gt_putn(ag_grounded_permil(corr,N)); gt_puts("\n" as *u8) } 64 65 // T5: the S-CLASS SPEC GATE passes (>=600 permil grounded + monotonic order) 66 total = total + 1 67 if ag_spec_gate(corr, lay, dpd, dep, N, 600) == 1 { pass = pass + 1 } else { gt_puts("T5 FAIL spec gate\n" as *u8) } 68 69 // T6: gate REJECTS a thin-air plan (all 0-evidence build claims) -- no fabricating a backlog 70 total = total + 1 71 let thin: *i64 = sys_mmap(64) as *i64 72 var ti: i64 = 0 73 while ti < N { thin[ti] = 0; ti = ti + 1 } // every item 0 evidence 74 if ag_spec_gate(thin, lay, dpd, dep, N, 600) == 0 { pass = pass + 1 } else { gt_puts("T6 FAIL thin-air passed\n" as *u8) } 75 76 // emit the live backlog (the deliverable: research -> assignments) 77 ag_emit(names, corr, act, lay, dpd, N) 78 79 gt_puts("ASSIGN-GEN " as *u8); gt_putn(pass); gt_puts("/" as *u8); gt_putn(total); gt_puts("\n" as *u8) 80 if pass == total { gt_puts("ASSIGN-GEN ALL-PASS\n" as *u8); sys_exit(0) } 81 sys_exit(1) 82 return 1 83}