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1// bench_multiseed.nx -- 20-workload accuracy averaging for OUR HLL + CPC. 2// 3// Today's single-sample verdict (HLL: LOSES) was an artifact of variance, 4// not algorithm. Both ours and DS got estimates within their declared 5// rel-stddev bound; DS happened to land closer to truth on seed 42. 6// 7// This harness varies the WORKLOAD across 20 distinct streams (each of N 8// unique keys), runs both primitives on every stream, and reports mean 9// error. Combined with the same workloads run through DS Python (see 10// bench_vs_ds_multiseed.py), we get a statistically fair accuracy verdict. 11 12// nx_safety_envelope: 13// intended_use: AUTO_APPLIED -- primitive-specific tuning queued 14// sil_target: SIL1 15// evidence: [bulk_applied_2026-05-16, see-file-comment-for-detail] 16// verdict: NOT_YET_EVALUATED 17 18import "nx_syscalls.nx" 19import "nx_sketch_hll.nx" 20import "nx_sketch_cpc_dense.nx" 21const K_MAGIC_2000: i64 = 2000 22const K_MAGIC_100000: i64 = 100000 23 24func ms_iabs(x: i64) -> i64 { 25 if x < 0 { return -x } 26 return x 27} 28 29// === decimal emitter (i64 -> stdout) ============================ 30 31func ms_putc(c: i64) -> i64 { 32 let buf: *u8 = sys_mmap(1) 33 buf[0] = c & 0xFF 34 sys_write(1, buf, 1) 35 return 0 36} 37 38func ms_str(s: *u8, len: i64) -> i64 { 39 sys_write(1, s, len) 40 return 0 41} 42 43func ms_i64(n: i64) -> i64 { 44 if n < 0 { 45 ms_putc(45) 46 return ms_i64(-n) 47 } 48 if n == 0 { 49 ms_putc(48) 50 return 0 51 } 52 let digits: *u8 = sys_mmap(32) 53 var d: i64 = 0 54 var v: i64 = n 55 while v > 0 { 56 digits[d] = (v % 10) + 48 57 v = v / 10 58 d = d + 1 59 } 60 while d > 0 { 61 d = d - 1 62 ms_putc(digits[d]) 63 } 64 return 0 65} 66 67func ms_nl() -> i64 { 68 ms_putc(10) 69 return 0 70} 71 72// === main ======================================================= 73// 74// Vary workload across 20 seeds. Each seed produces a different stream 75// of N distinct 8-byte keys. Both HLL and CPC run on every stream. 76 77func main() -> i64 { 78 let n: i64 = K_MAGIC_2000 79 let n_seeds: i64 = 20 80 81 var hll_sum_err: i64 = 0 82 var cpc_sum_err: i64 = 0 83 var hll_max_err: i64 = 0 84 var cpc_max_err: i64 = 0 85 86 let buf: *u8 = sys_mmap(8) 87 88 var s: i64 = 0 89 while s < n_seeds { 90 let workload_seed: i64 = s + 1 91 // Fresh sketches per workload run. 92 let hll: *Hll = nx_hll_alloc(7, 42) 93 let cpc: *CpcDense = nx_cpcd_alloc(3, 16, 42) 94 95 // Generate the workload deterministically from workload_seed. 96 var i: i64 = 0 97 while i < n { 98 let k: i64 = workload_seed * K_MAGIC_100000 + i 99 buf[0] = (k ) & 0xFF 100 buf[1] = (k >> 8 ) & 0xFF 101 buf[2] = (k >> 16) & 0xFF 102 buf[3] = (k >> 24) & 0xFF 103 buf[4] = 0 104 buf[5] = 0 105 buf[6] = 0 106 buf[7] = 0 107 nx_hll_add(hll, buf, 8) 108 nx_cpcd_add(cpc, buf, 8) 109 i = i + 1 110 } 111 112 let hll_est: i64 = nx_hll_estimate(hll) 113 let cpc_est: i64 = nx_cpcd_estimate(cpc) 114 let hll_err: i64 = ms_iabs(hll_est - n) 115 let cpc_err: i64 = ms_iabs(cpc_est - n) 116 117 hll_sum_err = hll_sum_err + hll_err 118 cpc_sum_err = cpc_sum_err + cpc_err 119 if hll_err > hll_max_err { hll_max_err = hll_err } 120 if cpc_err > cpc_max_err { cpc_max_err = cpc_err } 121 122 // Emit per-seed line so the harness can cross-reference DS output. 123 ms_str("seed=", 5) 124 ms_i64(workload_seed) 125 ms_str(" hll_est=", 9) 126 ms_i64(hll_est) 127 ms_str(" cpc_est=", 9) 128 ms_i64(cpc_est) 129 ms_nl() 130 131 s = s + 1 132 } 133 134 let hll_mean_err: i64 = hll_sum_err / n_seeds 135 let cpc_mean_err: i64 = cpc_sum_err / n_seeds 136 137 ms_str("our_hll_mean_err=", 17) 138 ms_i64(hll_mean_err) 139 ms_nl() 140 ms_str("our_hll_max_err=", 16) 141 ms_i64(hll_max_err) 142 ms_nl() 143 ms_str("our_cpc_mean_err=", 17) 144 ms_i64(cpc_mean_err) 145 ms_nl() 146 ms_str("our_cpc_max_err=", 16) 147 ms_i64(cpc_max_err) 148 ms_nl() 149 ms_str("workload_n=", 11) 150 ms_i64(n) 151 ms_nl() 152 ms_str("n_seeds=", 8) 153 ms_i64(n_seeds) 154 ms_nl() 155 156 return 0 157}