code wiki / _hdl_build / nx_compile_perf_test.nx
`nx_compile_perf_test.nx` source

1// nx_compile_perf_test.nx -- the team troubleshoots slow compiles the way real teams do (cache /
2// incremental / parallel / profile / bisect), under the <=3-step SLA. A cache hit skips the compile
3// entirely (the 1-step optimal); a hang routes to bisect+split; a slow build routes to caching; the
4// hot function is identified; parallelism cuts wall-time. Exit 0 on 7/7. license_tier: ORIGINAL
5
6import "nx_compile_perf.nx"
7import "nx_syscalls.nx"
8
9func ct_puts(s: *u8) -> i64 { var n: i64 = 0; while s[n] != (0 as u8) { n = n + 1 } sys_write(1, s, n); return 0 }
10func ct_num(v: i64) -> i64 { let bb: *u8 = sys_mmap(28); var m: i64=v; if m<0 {m=0-m}; let t: *u8 = sys_mmap(28); var k: i64=0; if m==0 {t[0]=48;k=1}; while m>0 {t[k]=48+(m%10); m=m/10; k=k+1}; var i: i64=0; while i<k {bb[i]=t[k-1-i]; i=i+1}; sys_write(1, bb, k); return 0 }
11
12func main() -> i64 {
13    ct_puts("=== COMPILE TROUBLESHOOTING (cache/incremental/parallel/profile/bisect), SLA-bound ===\n" as *u8)
14    // CACHE: 9 of 10 modules unchanged -> skip 90%
15    let skip: i64 = cp_cache_speedup_permil(10, 9)
16    let hit: i64 = cp_cache_hit(12345, 12345)
17    let miss: i64 = cp_cache_hit(12345, 99999)
18    // PARALLEL: 8 modules across 4 cores
19    let ptime: i64 = cp_parallel_time(8000, 8, 4)        // 8000ms serial -> ~2000ms
20    // PROFILE: per-function compile times, find the hot one
21    let times: *i64 = sys_mmap(8*8) as *i64; times[0]=120; times[1]=90; times[2]=2400; times[3]=60
22    let hot: i64 = cp_hottest(times, 4)
23    // LEVER by symptom
24    let lev_hang: i64 = cp_lever_for(CP_SYMPTOM_HANG)
25    let lev_slow: i64 = cp_lever_for(CP_SYMPTOM_SLOW)
26    // SLA steps
27    let st_cachehit: i64 = cp_troubleshoot_steps(CP_SYMPTOM_SLOW, 1)   // cache hit -> 0 (instant)
28    let st_hang: i64 = cp_troubleshoot_steps(CP_SYMPTOM_HANG, 0)       // hang -> 1
29
30    ct_puts(" CACHE: 9/10 unchanged -> skip " as *u8); ct_num(skip); ct_puts("/1000  hit=" as *u8); ct_num(hit); ct_puts(" miss=" as *u8); ct_num(miss); ct_puts("\n" as *u8)
31    ct_puts(" PARALLEL: 8000ms serial / 8 mods / 4 cores = " as *u8); ct_num(ptime); ct_puts("ms\n" as *u8)
32    ct_puts(" PROFILE: hottest module = #" as *u8); ct_num(hot); ct_puts(" (2400ms -- attack this one)\n" as *u8)
33    ct_puts(" LEVER: hang->" as *u8); ct_num(lev_hang); ct_puts(" (5=bisect+split)  slow->" as *u8); ct_num(lev_slow); ct_puts(" (1=cache)\n" as *u8)
34    ct_puts(" SLA: cache-hit steps=" as *u8); ct_num(st_cachehit); ct_puts(" (0=instant)  hang steps=" as *u8); ct_num(st_hang); ct_puts(" (1)\n" as *u8)
35
36    let r: *i64 = sys_mmap(8*8) as *i64
37    r[0] = 0; if skip == 900 { if hit == 1 { if miss == 0 { r[0] = 1 } } }   // caching skips unchanged
38    r[1] = 0; if ptime == 2000 { r[1] = 1 }                                  // parallel cuts wall-time
39    r[2] = 0; if hot == 2 { r[2] = 1 }                                       // profiler finds the hot module
40    r[3] = 0; if lev_hang == CP_LEVER_BISECT_SPLIT { r[3] = 1 }              // hang -> bisect+split
41    r[4] = 0; if lev_slow == CP_LEVER_CACHE { r[4] = 1 }                     // slow -> cache (the #1 win here)
42    r[5] = 0; if st_cachehit == 0 { if cp_within_sla(st_cachehit) == 1 { r[5] = 1 } }   // cache hit = instant
43    r[6] = 0; if st_hang == 1 { if cp_within_sla(st_hang) == 1 { r[6] = 1 } }           // hang fix within SLA
44    var pass: i64 = 0; var i: i64 = 0
45    while i < 7 { pass = pass + r[i]; i = i + 1 }
46    ct_puts("----\n passed " as *u8); ct_num(pass); ct_puts("/7\n" as *u8)
47    if pass == 7 { ct_puts(" FAST TROUBLESHOOTING: the team caches unchanged modules (skip 90%), parallelizes, profiles to the hot module, and routes hang->bisect+split / slow->cache -- all within the <=3-step SLA, research-grounded.\n" as *u8); sys_exit(0); return 0 }
48    ct_puts(" FAIL\n" as *u8); sys_exit(1); return 1
49}
nx_compile_perf_test.nx source

`nx_compile_perf_test.nx` source
