nx_decoder_imm_mem_test.nx source

1// nx_decoder_imm_mem_test.nx -- FUNCTIONAL gate-level verify of the I/S/B/U/J immediate decoders. 2// Builds nx_decoder_imm_build into a MEM sink, runs the gate-sim over 200 random instructions and 3// diffs each immediate net against the behavioral oracle nx_rv64im_imm_i/s/b/u/j (sign-extension 4// included -- the gate ORs the extend mask exactly as the oracle). Per-format mismatch counts must 5// all be 0. KAT: I-imm of addi x1,x0,-1 (0xFFF00093) = -1. Sovereign. 6// license_tier: ORIGINAL expect_exit: 0 7import "nx_decoder_select.nx" 8import "rv64im_min_decoder.nx" 9 10func _emit_cstr(s: *u8) -> i64 { 11 var n: i64 = 0 12 while s[n] != (0 as u8) { n = n + 1 } 13 sys_write(1, s, n) 14 return 0 15} 16func _emit_dec(v: i64) -> i64 { 17 let b: *u8 = sys_mmap(28) 18 let t2: *u8 = sys_mmap(28) 19 var n: i64 = v 20 if n < 0 { sys_write(1, "-" as *u8, 1); n = 0 - n } 21 var t: i64 = 0 22 if n == 0 { t2[0] = 48; t = 1 } 23 while n > 0 { t2[t] = 48 + (n % 10); n = n / 10; t = t + 1 } 24 var i: i64 = 0 25 while i < t { b[i] = t2[t - 1 - i]; i = i + 1 } 26 sys_write(1, b, t) 27 return 0 28} 29 30func main() -> i64 { 31 let cells: *NxGsimCell = sys_mmap(48 * 1024) as *NxGsimCell 32 let vals: *i64 = sys_mmap(8 * 1024) as *i64 33 let g: *NxGsim = sys_mmap(64) as *NxGsim 34 g.cells = cells 35 g.vals = vals 36 let k: *NxCellSink = sys_mmap(64) as *NxCellSink 37 38 g.n_nets = 1 // net 0 = inst 39 g.n_cells = 0 40 nx_sink_init_mem(k, g) 41 let outs: *i64 = sys_mmap(8 * 6) as *i64 42 nx_decoder_imm_build(k, 0, outs) 43 44 let mm: *i64 = sys_mmap(8 * 6) as *i64 // per-format mismatch counts 45 mm[0] = 0; mm[1] = 0; mm[2] = 0; mm[3] = 0; mm[4] = 0 46 47 var seed: i64 = 777777 48 var n: i64 = 0 49 while n < 200 { 50 seed = (seed * 1103515245 + 12345) & 2147483647 51 let hi: i64 = seed & 65535 52 seed = (seed * 1103515245 + 12345) & 2147483647 53 let lo: i64 = seed & 65535 54 let inst: i64 = (hi << 16) | lo 55 g.vals[0] = inst 56 if nx_gsim_run(g) != NX_GSIM_OK { sys_exit(40); return 40 } 57 if g.vals[outs[0]] != nx_rv64im_imm_i(inst) { mm[0] = mm[0] + 1 } 58 if g.vals[outs[1]] != nx_rv64im_imm_s(inst) { mm[1] = mm[1] + 1 } 59 if g.vals[outs[2]] != nx_rv64im_imm_b(inst) { mm[2] = mm[2] + 1 } 60 if g.vals[outs[3]] != nx_rv64im_imm_u(inst) { mm[3] = mm[3] + 1 } 61 if g.vals[outs[4]] != nx_rv64im_imm_j(inst) { mm[4] = mm[4] + 1 } 62 n = n + 1 63 } 64 _emit_cstr("imm mismatches I=" as *u8); _emit_dec(mm[0]) 65 _emit_cstr(" S=" as *u8); _emit_dec(mm[1]) 66 _emit_cstr(" B=" as *u8); _emit_dec(mm[2]) 67 _emit_cstr(" U=" as *u8); _emit_dec(mm[3]) 68 _emit_cstr(" J=" as *u8); _emit_dec(mm[4]); _emit_cstr("\n" as *u8) 69 70 // KAT: addi x1,x0,-1 = 0xFFF00093 -> I-imm = -1 71 let kat: i64 = 4293918867 // 0xFFF00093 72 g.vals[0] = kat 73 if nx_gsim_run(g) != NX_GSIM_OK { sys_exit(41); return 41 } 74 let kati: i64 = g.vals[outs[0]] 75 _emit_cstr("KAT I-imm(0xFFF00093)=" as *u8); _emit_dec(kati); _emit_cstr(" expect -1\n" as *u8) 76 77 var total: i64 = mm[0] + mm[1] + mm[2] + mm[3] + mm[4] 78 if total != 0 { sys_exit(1); return 1 } 79 if kati != (0 - 1) { sys_exit(2); return 2 } 80 _emit_cstr("decoder IMMEDIATES gate-verify PASS (I/S/B/U/J, 1000 checks 0 mismatch; sext KAT exact)\n" as *u8) 81 sys_exit(0) 82 return 0 83}