code wiki / _hdl_build / nx_diff_cmp_register.nx
`nx_diff_cmp_register.nx` source

1// nx_diff_cmp_register.nx -- records R1-T1-002 (dual-lane differential
2// harness) + the day-one finding.  Engineer gate = DCGATE 5/5 re-run GREEN
3// at register time.  Librarian alloc + dual-write.  license_tier: ORIGINAL
4import "nx_cap_register.nx"
5import "nx_capreg_librarian.nx"
6import "nx_syscalls.nx"
7
8func dcr_run(path: *u8) -> i64 {
9    let pid: i64 = sys_fork()
10    if pid == 0 {
11        let dn: i64 = sys_openat_wr("/dev/null" as *u8, 0x1a4)
12        if dn >= 0 { sys_dup3(dn, 1, 0); sys_dup3(dn, 2, 0) }
13        let argv: *i64 = sys_mmap(32) as *i64; argv[0] = path as i64; argv[1] = 0
14        let envp: *i64 = sys_mmap(16) as *i64; envp[0] = 0
15        sys_execve(path, argv, envp); sys_exit(127)
16    }
17    let st: *i64 = sys_mmap(16) as *i64
18    sys_wait4(pid, st, 0)
19    return st[0]
20}
21
22func main() -> i64 {
23    var allok: i64 = 1
24    if dcr_run("/tmp/_diff_cmp_gate_authored.sov.elf" as *u8) != 0 { allok = 0 }
25    cr_w(1, "ENGINEER: diff-cmp 5-check gate re-run all-pass=" as *u8); cr_wn(1, allok); cr_w(1, "\n" as *u8)
26    let eng: i64 = ig_engineer(1, 1, 1, allok)
27    let dec: i64 = ig_decision(eng, ig_council(eng, 1, 1, 2), 1)
28    if dec != IG_INGEST { cr_w(1, "HELD\n" as *u8); sys_exit(1) }
29    if cr_can_register(5, 2, 6, dec) != 1 { cr_w(1, "REFUSED\n" as *u8); sys_exit(1) }
30    let lp: *u8 = "/tmp/nishi_cap_registry.log" as *u8
31    let jp: *u8 = "knowledge/status/cap_registry_durable.log" as *u8
32    let idx: i64 = cl_next_idx(lp, jp)
33    let ok: i64 = cl_register_dual(lp, jp, idx, 5,
34        2, "PREVENT DUAL-LANE-DIFF-HARNESS (R1-T1-002, closed by reconcile on DCGATE; the corpus became an ORACLE) -- nx_diff_cmp/nx_dc_core: each corpus program through BOTH toolchains (lane A = durable sovereign runner; lane B = frozen known-good cc + same nxasm, per-idx scratch paths = stale-tail-safe-by-determinism), exit codes compared under CONTROLLED IDENTICAL exec context; DISAGREE = finding -> source copied to _dgbug<idx>.nx (lane-buildable by basename = ready T2 fix-corpus) + DIFFBUG row; findings are SUCCESS (exit 0 + rows), only infra is RED; conf-bounded batch (diff_cmp.conf, bounded-N-per-beat). DCGATE 5/5: rows/summary/partition/repro-teeth(conditional honest)/determinism. DAY-ONE REAL FINDING (filed R1-T1-006 w=9 + R1-T1-005 harness dimension): _dgp0 (seed 1106202601) exits 0 from bash but 1 from a sovereign-compiled parent IN BOTH TOOLCHAINS -- kernel-verified (raw wait4 st=256 vs bash $?=0, KG .s md5-identical across compiles, both-env-classes tested) = INHERITED uninit-stack-read codegen class (KG is the sovereign chain's frozen ancestor); dual-lane compare alone CANNOT see it (both lanes agree on the same garbage) -> the harness needs the cross-context + repeat dimension (R1-T1-005). METHOD LESSON pinned: compare lanes from the SAME parent context; bash-side manual probes are a different measurement. Probes _dcb_probe/_dcb_probe2 = the repro harness; corpus determinism makes the repro durable BY SEED. Unblocks R1-T1-003 beat wiring (next: seeded-4deep-catch + auto-pm rows)" as *u8)
35    if ok != 1 { cr_w(1, "DUAL-WRITE FAILED\n" as *u8); sys_exit(1) }
36    cr_w(1, "CAPREG idx=" as *u8); cr_wn(1, idx); cr_w(1, " REGISTERED -- two toolchains now interrogate each other\n" as *u8)
37    sys_exit(0)
38    return 0
39}
nx_diff_cmp_register.nx source

`nx_diff_cmp_register.nx` source
