code wiki / _hdl_build / nx_diff_gen_register.nx
nx_diff_gen_register.nx source
↩ module page · 40 lines · 3270 B
1// nx_diff_gen_register.nx -- records R1-T1-001 (diff-corpus generator).
2// Engineer gate = the 4-check DGGATE proof (incl 8-sample lane builds)
3// re-run GREEN at register time. Librarian alloc + dual-write.
4// license_tier: ORIGINAL
5import "nx_cap_register.nx"
6import "nx_capreg_librarian.nx"
7import "nx_syscalls.nx"
8
9func dgr_run(path: *u8) -> i64 {
10 let pid: i64 = sys_fork()
11 if pid == 0 {
12 let dn: i64 = sys_openat_wr("/dev/null" as *u8, 0x1a4)
13 if dn >= 0 { sys_dup3(dn, 1, 0); sys_dup3(dn, 2, 0) }
14 let argv: *i64 = sys_mmap(32) as *i64; argv[0] = path as i64; argv[1] = 0
15 let envp: *i64 = sys_mmap(16) as *i64; envp[0] = 0
16 sys_execve(path, argv, envp); sys_exit(127)
17 }
18 let st: *i64 = sys_mmap(16) as *i64
19 sys_wait4(pid, st, 0)
20 return st[0]
21}
22
23func main() -> i64 {
24 var allok: i64 = 1
25 if dgr_run("/tmp/_diff_gen_gate_authored.sov.elf" as *u8) != 0 { allok = 0 }
26 cr_w(1, "ENGINEER: diff-gen 4-check gate (incl lane sample builds) re-run all-pass=" as *u8); cr_wn(1, allok); cr_w(1, "\n" as *u8)
27 let eng: i64 = ig_engineer(1, 1, 1, allok)
28 let dec: i64 = ig_decision(eng, ig_council(eng, 1, 1, 2), 1)
29 if dec != IG_INGEST { cr_w(1, "HELD\n" as *u8); sys_exit(1) }
30 if cr_can_register(5, 2, 6, dec) != 1 { cr_w(1, "REFUSED\n" as *u8); sys_exit(1) }
31 let lp: *u8 = "/tmp/nishi_cap_registry.log" as *u8
32 let jp: *u8 = "knowledge/status/cap_registry_durable.log" as *u8
33 let idx: i64 = cl_next_idx(lp, jp)
34 let ok: i64 = cl_register_dual(lp, jp, idx, 5,
35 2, "PREVENT DIFF-CORPUS-GENERATOR (R1-T1-001, the miscompile-class prevent instrument's first rung; closed BY reconcile on DGGATE evidence) -- nx_diff_gen: conf-driven (knowledge/registry/diff_corpus.conf n/seed/max_stmts, no magic numbers) DETERMINISTIC random-program generator in the SUPPORTED dialect envelope so any failure = a NEW toolchain bug never a known landmine: counted while loops (literal bounds = termination by construction), ifs <=2 deep, i64 +/-/* only, every shift masked (LM-005), non-negative literals (LM-004), sys_exit(sum&1) so legal exits are EXACTLY {0,1} (lane 3/4 = toolchain fail, >128 = crash, else loud). LCG PRNG 31-bit overflow-free; same conf = byte-identical corpus (hash-proven). Programs land in runtime/_hdl_build/_dgp<i>.nx because expand_imports resolves ONLY there (probed live: /tmp sources fail expand_imports + main-return is NOT the exit code, sys_exit required -- two dialect facts pinned) => durable lane builds any corpus program by basename w/ retry guard. Files padded to fixed 3072B (LM-022 stale-tail killed across seed changes). Gate DGGATE 4/4 first run: LIVE-200 (200/200 wrote, 115KB), DET-SAME (hash eq across runs), DET-DIFF (seed change diverges), SAMPLE-8 (8/8 corpus programs built+ran rc-in-{0,1} through the REAL sovereign lane). UNBLOCKS R1-T1-002 dual-lane compare (current chain vs known-good on identical corpus) -> T1-003 beat wiring -> T2 miscompile root-fix corpus. Registered after gate re-run" as *u8)
36 if ok != 1 { cr_w(1, "DUAL-WRITE FAILED\n" as *u8); sys_exit(1) }
37 cr_w(1, "CAPREG idx=" as *u8); cr_wn(1, idx); cr_w(1, " REGISTERED -- the miscompile prevent instrument has its corpus\n" as *u8)
38 sys_exit(0)
39 return 0
40}