code wiki / _hdl_build / nx_emu_x86_boot_test.nx
`nx_emu_x86_boot_test.nx` source

1// nx_emu_x86_boot_test.nx -- the x86 analog of the rv64 boot: author a tiny x86-64 "boot stub" that
2// WRITES a serial line then exits, and run it on the sovereign x86 interpreter (now write-capable).
3// Proves x86 machine code EXECUTES + OUTPUTS on Nishi's own x86 model (no qemu).
4// HONEST SCOPE: this is instruction-level x86 (the emu does register-direct + write/exit).  A real
5// bootable x86 USB (real-mode->protected->long-mode, IDT/paging/devices, a bootloader, USB) is a
6// LARGE arc beyond this; the mature full-system boot path is rv64 (nx_boot_run_sov).  This rung just
7// closes "x86 can output", the first step.  No hardware writes (Rule 26).  expect_exit: 0  license_tier: ORIGINAL
8import "nx_emu_x86.nx"
9
10func bx_put_b(code: *u8, o: i64, byte: i64) -> i64 { code[o] = (byte & 0xff) as u8; return o+1 }
11func bx_put_i32(code: *u8, o: i64, v: i64) -> i64 { code[o]=(v & 0xff) as u8; code[o+1]=((v>>8) & 0xff) as u8; code[o+2]=((v>>16) & 0xff) as u8; code[o+3]=((v>>24) & 0xff) as u8; return o+4 }
12func bx_puts(s: *u8) -> i64 { var n: i64=0; while s[n]!=(0 as u8){n=n+1} sys_write(1,s,n); return 0 }
13func bx_num(v: i64) -> i64 { let b: *u8=sys_mmap(28); var m: i64=v; if m<0{m=0-m;sys_write(1,"-" as *u8,1)} let t: *u8=sys_mmap(28); var k: i64=0; if m==0{t[0]=48 as u8;k=1} while m>0{t[k]=(48+(m%10)) as u8;m=m/10;k=k+1} var i: i64=0; while i<k{b[i]=t[k-1-i];i=i+1} sys_write(1,b,k); return 0 }
14
15func main() -> i64 {
16    let img: *u8 = sys_mmap(256)
17    var o: i64 = 0
18    // mov rdi, 1   (fd = stdout)
19    o=bx_put_b(img,o,0x48); o=bx_put_b(img,o,0xC7); o=bx_put_b(img,o,0xC7); o=bx_put_i32(img,o,1)
20    // mov rsi, <str_off>  (imm patched after we know where the string lands)
21    o=bx_put_b(img,o,0x48); o=bx_put_b(img,o,0xC7); o=bx_put_b(img,o,0xC6)
22    let rsi_imm: i64 = o
23    o=bx_put_i32(img,o,0)
24    // mov rdx, 10  (len)
25    o=bx_put_b(img,o,0x48); o=bx_put_b(img,o,0xC7); o=bx_put_b(img,o,0xC2); o=bx_put_i32(img,o,10)
26    // mov rax, 1   (write)
27    o=bx_put_b(img,o,0x48); o=bx_put_b(img,o,0xC7); o=bx_put_b(img,o,0xC0); o=bx_put_i32(img,o,1)
28    // syscall
29    o=bx_put_b(img,o,0x0F); o=bx_put_b(img,o,0x05)
30    // mov rdi, 0   (exit code)
31    o=bx_put_b(img,o,0x48); o=bx_put_b(img,o,0xC7); o=bx_put_b(img,o,0xC7); o=bx_put_i32(img,o,0)
32    // mov rax, 60  (exit)
33    o=bx_put_b(img,o,0x48); o=bx_put_b(img,o,0xC7); o=bx_put_b(img,o,0xC0); o=bx_put_i32(img,o,60)
34    // syscall
35    o=bx_put_b(img,o,0x0F); o=bx_put_b(img,o,0x05)
36    // string "NISHI-X86\n" at offset o
37    let str_off: i64 = o
38    img[o]=78 as u8; o=o+1; img[o]=73 as u8; o=o+1; img[o]=83 as u8; o=o+1; img[o]=72 as u8; o=o+1; img[o]=73 as u8; o=o+1
39    img[o]=45 as u8; o=o+1; img[o]=88 as u8; o=o+1; img[o]=56 as u8; o=o+1; img[o]=54 as u8; o=o+1; img[o]=10 as u8; o=o+1
40    // patch the rsi immediate to the string offset
41    bx_put_i32(img, rsi_imm, str_off)
42
43    bx_puts("=== x86 BOOT STUB on the sovereign x86 emu (write+exit) ===\n SOVEREIGN-EMU-X86 serial: " as *u8)
44    let rc: i64 = emu_x86_run(img, o)
45    bx_puts(" x86 stub exit code = " as *u8); bx_num(rc); bx_puts("\n" as *u8)
46    if rc==0 { bx_puts("X86-BOOT verdict=GREEN (x86 machine code executes + writes serial on Nishi's own x86 model; full x86 SYSTEM boot = big arc, rv64 is the mature path)\n" as *u8); sys_exit(0); return 0 }
47    bx_puts("X86-BOOT verdict=RED rc=" as *u8); bx_num(rc); bx_puts("\n" as *u8); sys_exit(1); return 1
48}
nx_emu_x86_boot_test.nx source

`nx_emu_x86_boot_test.nx` source
