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1// nx_evo_isa_sov.nx -- THE FULL LOOP, LIVE end-to-end. DERIVE a real RV64 program by live 2// search (NO embedded sequence) for f(a,b)=a*b+a over the real ISA ops (ADD/SUB/MUL/AND/OR/SLT, 3// semantics = rv64im_min_sim's ALU); verify it generalizes on a grid; then ENCODE the 4// LIVE-derived best genome to machine code (rv_lui = the search-derived enc_u) + wrap (li a,b; 5// sb result->UART; SiFive-finisher halt); LOAD into rv64im_min_sim (god); RUN; and VERIFY the 6// captured UART byte == the search's OWN prediction es_eval(best,a,b) -- which simultaneously 7// confirms the interpreter's semantics == the sim's ALU. Hardware->derive->hardware, live. 8// license_tier: ORIGINAL 9import "nx_syscalls.nx" 10import "nx_itoa_lib.nx" // shared MSB-first emitter (zero-alloc) 11import "nishi_hdl_primitives.nx" 12import "rv64im_min_decoder.nx" 13import "rv64im_min_alu.nx" 14import "rv64im_min_regfile.nx" 15import "rv64im_min_csr.nx" 16import "rv64im_min_clint.nx" 17import "rv64im_min_uart.nx" 18import "rv64im_min_sim.nx" 19const EVO_MAGIC_2862933555777941757: i64 = 2862933555777941757 20const EVO_MAGIC_3037000493: i64 = 3037000493 21const EVO_MAGIC_4000000: i64 = 4000000 22const EVO_MAGIC_2654435761: i64 = 2654435761 23const EVO_MAGIC_12345: i64 = 12345 24const EVO_MAGIC_1000000000: i64 = 1000000000 25 26const NINSTR: i64 = 2 27const GLEN: i64 = 6 28const EVO_P: i64 = 256 29const EVO_G: i64 = 2000 30const EVO_T: i64 = 5 31const NTRAIN: i64 = 6 32const IR_MEM_BASE: i64 = 0x80000000 33const IR_MEM_SIZE: i64 = 4096 34const IR_TX_CAP: i64 = 256 35 36func es_rand(s: *i64) -> i64 { s[0] = s[0] * EVO_MAGIC_2862933555777941757 + EVO_MAGIC_3037000493; return (s[0] >> 17) & 0x3fffffff } 37func es_absv(x: i64) -> i64 { if x < 0 { return 0 - x } return x } 38func es_pa(i: i64) -> i64 { if i==0 {return 3} if i==1 {return 5} if i==2 {return 7} if i==3 {return 2} if i==4 {return 8} return 4 } 39func es_pb(i: i64) -> i64 { if i==0 {return 4} if i==1 {return 2} if i==2 {return 3} if i==3 {return 6} if i==4 {return 5} return 7 } 40func es_target(a: i64, b: i64) -> i64 { return a * b + a } 41 42// ISA ALU (semantics matched to rv64im_min_sim): 0 ADD,1 SUB,2 MUL,3 AND,4 OR,5 SLT. 43func es_op(op: i64, x: i64, y: i64) -> i64 { 44 if op == 0 { return x + y } 45 if op == 1 { return x - y } 46 if op == 2 { return x * y } 47 if op == 3 { return x & y } 48 if op == 4 { return x | y } 49 if x < y { return 1 } return 0 50} 51func es_reg(idx: i64, a: i64, b: i64, r3: i64) -> i64 { if idx==0 {return 0} if idx==1 {return a} if idx==2 {return b} return r3 } 52func es_eval(gen: *i64, base: i64, a: i64, b: i64) -> i64 { 53 var r3: i64 = 0; var j: i64 = 0 54 while j < NINSTR { 55 let op: i64 = gen[base + j*3]; let rs1: i64 = gen[base + j*3 + 1]; let rs2: i64 = gen[base + j*3 + 2] 56 r3 = es_op(op, es_reg(rs1, a, b, r3), es_reg(rs2, a, b, r3)) 57 j = j + 1 58 } 59 return r3 60} 61func es_setinstr(gen: *i64, j: i64, state: *i64) -> i64 { gen[j*3] = es_rand(state) % 6; gen[j*3+1] = es_rand(state) % 4; gen[j*3+2] = es_rand(state) % 4; return 0 } 62func es_fit(pop: *i64, base: i64) -> i64 { 63 var err: i64 = 0; var i: i64 = 0 64 while i < NTRAIN { 65 let a: i64 = es_pa(i); let b: i64 = es_pb(i); let r: i64 = es_eval(pop, base, a, b) 66 var d: i64 = EVO_MAGIC_4000000 67 if r >= 0 - EVO_MAGIC_4000000 { if r <= EVO_MAGIC_4000000 { d = es_absv(r - es_target(a, b)) } } 68 err = err + d; i = i + 1 69 } 70 return err 71} 72func es_tourney(fit: *i64, state: *i64) -> i64 { var bi: i64 = es_rand(state) % EVO_P; var bd: i64 = fit[bi]; var k: i64 = 1; while k < EVO_T { let i: i64 = es_rand(state) % EVO_P; if fit[i] < bd { bd = fit[i]; bi = i } k = k + 1 } return bi } 73func es_mut(gen: *i64, base: i64, state: *i64) -> i64 { let j: i64 = es_rand(state) % NINSTR; let f: i64 = es_rand(state) % 3; if f == 0 { gen[base + j*3] = es_rand(state) % 6 } else { gen[base + j*3 + f] = es_rand(state) % 4 } return 0 } 74 75func rv_addi(rd: i64, rs1: i64, imm: i64) -> i64 { return ((imm & 0xFFF) << 20) | (rs1 << 15) | (rd << 7) | 0x13 } 76func rv_lui(rd: i64, imm20: i64) -> i64 { return ((imm20 & 0xFFFFF) << 12) | (rd << 7) | 0x37 } 77func rv_rtype(f7: i64, rs2: i64, rs1: i64, f3: i64, rd: i64) -> i64 { return (f7 << 25) | (rs2 << 20) | (rs1 << 15) | (f3 << 12) | (rd << 7) | 0x33 } 78func rv_store(rs2: i64, rs1: i64, f3: i64) -> i64 { return (rs2 << 20) | (rs1 << 15) | (f3 << 12) | 0x23 } 79func rv_f3(op: i64) -> i64 { if op==3 {return 7} if op==4 {return 6} if op==5 {return 2} return 0 } 80func rv_f7(op: i64) -> i64 { if op==1 {return 0x20} if op==2 {return 1} return 0 } 81func rv_w32(buf: *u8, off: i64, w: i64) -> i64 { buf[off] = (w & 0xff) as u8; buf[off+1] = ((w>>8)&0xff) as u8; buf[off+2] = ((w>>16)&0xff) as u8; buf[off+3] = ((w>>24)&0xff) as u8; return off + 4 } 82 83func es_p(s: *u8) -> i64 { var n: i64 = 0; while s[n] != (0 as u8) { n = n + 1 } sys_write(1, s, n); return 0 } 84// MIGRATED to the shared emitter (debt 1785563586). The old body mmapped a scratch buffer 85// per call and never freed it. At PAGE granularity that is 4096B leaked PER CALL -- the 86// defect that took 28.5GB of a 36GB host in nx_ts_lumadiff (2MB input, ~3.66M calls). 87// nxi_* is MSB-first, allocates NOTHING, and emits identical bytes including the sign. 88func es_n(v: i64) -> i64 { nxi_out(v); return 0 } 89 90func main() -> i64 { 91 let state: *i64 = sys_mmap(8) as *i64; state[0] = 7 * EVO_MAGIC_2654435761 + EVO_MAGIC_12345 92 let pop: *i64 = sys_mmap(EVO_P * GLEN * 8) as *i64 93 let nxt: *i64 = sys_mmap(EVO_P * GLEN * 8) as *i64 94 let fit: *i64 = sys_mmap(EVO_P * 8) as *i64 95 let best: *i64 = sys_mmap(GLEN * 8) as *i64 96 var p: i64 = 0 97 while p < EVO_P { var j: i64 = 0; while j < NINSTR { es_setinstr(pop, p*NINSTR + j, state); j = j + 1 } p = p + 1 } 98 var best_err: i64 = EVO_MAGIC_1000000000 99 var g: i64 = 0 100 while g < EVO_G { 101 var gbest: i64 = EVO_MAGIC_1000000000; var gbp: i64 = 0 102 p = 0 103 while p < EVO_P { let e: i64 = es_fit(pop, p*GLEN); fit[p] = e; if e < gbest { gbest = e; gbp = p } p = p + 1 } 104 if gbest < best_err { best_err = gbest; var j: i64 = 0; while j < GLEN { best[j] = pop[gbp*GLEN + j]; j = j + 1 } } 105 if best_err == 0 { g = EVO_G } else { 106 var j2: i64 = 0; while j2 < GLEN { nxt[j2] = best[j2]; j2 = j2 + 1 } 107 p = 1 108 while p < EVO_P { 109 let pa: i64 = es_tourney(fit, state) * GLEN 110 let pb: i64 = es_tourney(fit, state) * GLEN 111 let cut: i64 = ((es_rand(state) % (NINSTR - 1)) + 1) * 3 112 var jj: i64 = 0 113 while jj < GLEN { if jj < cut { nxt[p*GLEN + jj] = pop[pa + jj] } else { nxt[p*GLEN + jj] = pop[pb + jj] } jj = jj + 1 } 114 es_mut(nxt, p*GLEN, state) 115 p = p + 1 116 } 117 var c: i64 = 0; while c < EVO_P * GLEN { pop[c] = nxt[c]; c = c + 1 } 118 g = g + 1 119 } 120 } 121 var gridbad: i64 = 0 122 var ga: i64 = 1 123 while ga <= 12 { var gb: i64 = 1; while gb <= 12 { if es_eval(best, 0, ga, gb) != es_target(ga, gb) { gridbad = gridbad + 1 } gb = gb + 1 } ga = ga + 1 } 124 es_p("EVOISASOV derive: best_err=" as *u8); es_n(best_err); es_p(" grid_mismatch=" as *u8); es_n(gridbad); es_p(" derived=[" as *u8) 125 var jg: i64 = 0 126 while jg < NINSTR { es_p("op" as *u8); es_n(best[jg*3]); es_p(",x" as *u8); es_n(best[jg*3+1]); es_p(",x" as *u8); es_n(best[jg*3+2]); es_p(" " as *u8); jg = jg + 1 } 127 es_p("]\n" as *u8) 128 129 let rf_storage: *i64 = (sys_mmap(8 * NX_RV64IM_RF_N_REGS)) as *i64 130 let csr_storage: *i64 = (sys_mmap(8 * NX_CSR_SLOT_N)) as *i64 131 let clint_storage: *i64 = (sys_mmap(8 * NX_CLINT_SLOT_N)) as *i64 132 let uart_storage: *i64 = (sys_mmap(8 * NX_UART_SLOT_N)) as *i64 133 let mem: *u8 = sys_mmap(IR_MEM_SIZE) 134 let tx_buf: *u8 = sys_mmap(IR_TX_CAP) 135 let rf: *NxRv64imRegfile = (sys_mmap(64)) as *NxRv64imRegfile 136 let csr: *NxRv64imCsrFile = (sys_mmap(64)) as *NxRv64imCsrFile 137 let clint: *NxClint = (sys_mmap(64)) as *NxClint 138 let uart: *NxUart = (sys_mmap(64)) as *NxUart 139 let sim: *NxRv64imSim = (sys_mmap(128)) as *NxRv64imSim 140 nx_rv64im_rf_init(rf, rf_storage) 141 nx_rv64im_csr_init(csr, csr_storage, 0) 142 nx_clint_init(clint, clint_storage) 143 nx_uart_init(uart, uart_storage, tx_buf, IR_TX_CAP) 144 nx_rv64im_sim_init(sim, rf, csr, clint, uart, IR_MEM_BASE, mem, IR_MEM_SIZE, 0) 145 146 let a: i64 = 6 147 let b: i64 = 7 148 var o: i64 = 0 149 o = rv_w32(mem, o, rv_addi(1, 0, a)) 150 o = rv_w32(mem, o, rv_addi(2, 0, b)) 151 jg = 0 152 while jg < NINSTR { let op: i64 = best[jg*3]; let rs1: i64 = best[jg*3+1]; let rs2: i64 = best[jg*3+2]; o = rv_w32(mem, o, rv_rtype(rv_f7(op), rs2, rs1, rv_f3(op), 3)); jg = jg + 1 } 153 o = rv_w32(mem, o, rv_lui(5, 0x10000)) 154 o = rv_w32(mem, o, rv_store(3, 5, 0)) 155 o = rv_w32(mem, o, rv_lui(7, 0x100)) 156 o = rv_w32(mem, o, rv_lui(6, 0x5)) 157 o = rv_w32(mem, o, rv_addi(6, 6, 0x555)) 158 o = rv_w32(mem, o, rv_store(6, 7, 2)) 159 o = rv_w32(mem, o, 0x6F) 160 nx_rv64im_sim_run(sim, 200) 161 162 let predicted: i64 = es_eval(best, 0, a, b) & 0xff 163 let got: i64 = (tx_buf[0] as i64) & 0xff 164 es_p("EVOISASOV run: a=" as *u8); es_n(a); es_p(" b=" as *u8); es_n(b); es_p(" sim_uart_byte=" as *u8); es_n(got); es_p(" search_predicted=" as *u8); es_n(predicted); es_p(" halted=" as *u8); es_n(sim.halted); es_p("\n" as *u8) 165 if best_err == 0 { if gridbad == 0 { if sim.halted == 1 { if got == predicted { 166 es_p("EVOISASOV GREEN: LIVE search-derived RV64 program ran on rv64im_min_sim (god); sim output == search prediction == a*b+a. Loop closed end-to-end.\n" as *u8) 167 sys_exit(0); return 0 168 } } } } 169 es_p("EVOISASOV RED\n" as *u8) 170 sys_exit(1) 171 return 1 172}