nx_f32x4_mt_matmul.nx source

1// nx_f32x4_mt_matmul.nx -- STACK the two proven compute levers toward physics: PACKED SIMD x MULTICORE. 2// Packed __f32x4_dot (4 f32 MACs/mulps, measured 3.97x) inside each forked worker's row band (sys_fork + 3// sys_mmap_shared + sys_wait4). Measures the full climb up the compute wall: scalar single-thread -> 4// packed single-thread -> packed multicore, with the gap to the derived silicon f32 peak (~1.84 TFLOP/s, 5// 20 cores @ 2879 MHz) at each step. This is the "get to exceed" trajectory: stacking what's proven shrinks 6// the 469x gap toward physics; what remains after = AVX2 8-wide (2x) + FMA (2x) -- the next two encoding rungs. 7// Correctness: packed-multicore C == scalar-single-thread C, BIT-EXACT (small-int f32 -> order-independent). 8// Sovereign: nx_cc packed SSE + raw fork/shared syscalls, no gcc/no BLAS/no OpenMP. No hw writes (Rule 26). 9// expect_exit: 0 license_tier: ORIGINAL 10import "nx_syscalls.nx" 11const K_MAGIC_1842560: i64 = 1842560 12 13func mp_puts(s: *u8) -> i64 { var n: i64=0; while s[n]!=(0 as u8){n=n+1} sys_write(1,s,n); return 0 } 14func mp_num(v: i64) -> i64 { let b: *u8=sys_mmap(28); var m: i64=v; if m<0{m=0-m;sys_write(1,"-" as *u8,1)} let t: *u8=sys_mmap(28); var k: i64=0; if m==0{t[0]=48 as u8;k=1} while m>0{t[k]=(48+(m%10)) as u8;m=m/10;k=k+1} var i: i64=0; while i<k{b[i]=t[k-1-i];i=i+1} sys_write(1,b,k); return 0 } 15func pack4(buf: *u8, idx: i64, bits: i64) -> i64 { buf[idx*4+0]=(bits) as u8; buf[idx*4+1]=(bits>>8) as u8; buf[idx*4+2]=(bits>>16) as u8; buf[idx*4+3]=(bits>>24) as u8; return 0 } 16 17// scalar row band (i64-per-f32, B non-transposed: b[l*N+j]) 18func band_scalar(a: *i64, b: *i64, c: *i64, M: i64, N: i64, K: i64, w: i64, nw: i64) -> i64 { 19 let r0: i64=w*M/nw 20 let r1: i64=(w+1)*M/nw 21 var i: i64=r0 22 while i<r1 { var j: i64=0 23 while j<N { var acc: i64=__f32_from_i64(0); var l: i64=0 24 while l<K { acc=__f32_add(acc, __f32_mul(a[i*K+l], b[l*N+j])); l=l+1 } 25 c[i*N+j]=acc; j=j+1 } 26 i=i+1 } 27 return 0 28} 29 30// packed row band (4-byte f32, Bt transposed: pbt[j][k] contiguous -> __f32x4_dot) 31func band_packed(pa: *u8, pbt: *u8, c: *i64, M: i64, N: i64, K: i64, w: i64, nw: i64) -> i64 { 32 let pab: i64=pa as i64 33 let pbb: i64=pbt as i64 34 let r0: i64=w*M/nw 35 let r1: i64=(w+1)*M/nw 36 var i: i64=r0 37 while i<r1 { var j: i64=0 38 while j<N { var acc: i64=__f32_from_i64(0); var k: i64=0 39 while k<K { acc=__f32_add(acc, __f32x4_dot((pab+(i*K+k)*4) as *u8, (pbb+(j*K+k)*4) as *u8)); k=k+4 } 40 c[i*N+j]=acc; j=j+1 } 41 i=i+1 } 42 return 0 43} 44 45func main() -> i64 { 46 mp_puts("STACKING compute levers toward physics: PACKED SIMD x MULTICORE (sovereign nx_cc + fork/shared, no BLAS)\n\n" as *u8) 47 let SZ: i64=512 48 let NW: i64=16 49 let sa: *i64 = sys_mmap_shared(SZ*SZ*8) as *i64 50 let sb: *i64 = sys_mmap_shared(SZ*SZ*8) as *i64 51 let pa: *u8 = sys_mmap_shared(SZ*SZ*4) 52 let pbt: *u8 = sys_mmap_shared(SZ*SZ*4) 53 let C: *i64 = sys_mmap_shared(SZ*SZ*8) as *i64 54 let C0: *i64 = sys_mmap(SZ*SZ*8) as *i64 55 let Cp: *i64 = sys_mmap(SZ*SZ*8) as *i64 56 57 // A[r][c]=B[r][c]=(r+c)%4+1 ; scalar sa/sb in place, packed pa in place, pbt = B transposed 58 var r: i64=0 59 while r<SZ { var c: i64=0 60 while c<SZ { 61 let v: i64=__f32_from_i64(((r+c)%4)+1) 62 sa[r*SZ+c]=v; sb[r*SZ+c]=v 63 pack4(pa, r*SZ+c, v) 64 pack4(pbt, c*SZ+r, v) 65 c=c+1 } 66 r=r+1 } 67 68 let flop: i64 = 2*SZ*SZ*SZ 69 70 // 1) scalar single-thread 71 let t0: i64=sys_now_us() 72 band_scalar(sa, sb, C0, SZ, SZ, SZ, 0, 1) 73 let t1: i64=sys_now_us() 74 var us_s1: i64=t1-t0 75 if us_s1<=0 { us_s1=1 } 76 77 // 2) packed single-thread 78 let t2: i64=sys_now_us() 79 band_packed(pa, pbt, Cp, SZ, SZ, SZ, 0, 1) 80 let t3: i64=sys_now_us() 81 var us_p1: i64=t3-t2 82 if us_p1<=0 { us_p1=1 } 83 84 // 3) packed multicore (fork NW workers over shared C) 85 let pids: *i64 = sys_mmap(NW*8) as *i64 86 let t4: i64=sys_now_us() 87 var w: i64=0 88 while w<NW { 89 let pid: i64=sys_fork() 90 if pid==0 { band_packed(pa, pbt, C, SZ, SZ, SZ, w, NW); sys_exit(0) } else { pids[w]=pid; w=w+1 } 91 } 92 w=0 93 let st: *i64 = sys_mmap(8) as *i64 94 while w<NW { sys_wait4(pids[w], st, 0); w=w+1 } 95 let t5: i64=sys_now_us() 96 var us_pN: i64=t5-t4 97 if us_pN<=0 { us_pN=1 } 98 99 // correctness: packed-multicore == scalar-serial, bit-exact 100 var mism: i64=0 101 var i2: i64=0 102 while i2<SZ*SZ { if C[i2]!=C0[i2] { mism=mism+1 } i2=i2+1 } 103 104 let mf_s1: i64 = flop/us_s1 105 let mf_p1: i64 = flop/us_p1 106 let mf_pN: i64 = flop/us_pN 107 let gap_s1: i64 = K_MAGIC_1842560/mf_s1 108 let gap_pN: i64 = K_MAGIC_1842560/mf_pN 109 var sp_p10: i64 = us_s1*10/us_p1 110 var sp_N10: i64 = us_s1*10/us_pN 111 112 mp_puts(" matmul "); mp_num(SZ); mp_puts("x"); mp_num(SZ); mp_puts("x"); mp_num(SZ); mp_puts(", "); mp_num(NW); mp_puts(" workers\n"); 113 mp_puts(" [1] scalar single-thread : "); mp_num(mf_s1); mp_puts(" MFLOP/s (gap to silicon peak ~"); mp_num(gap_s1); mp_puts("x)\n"); 114 mp_puts(" [2] PACKED single-thread : "); mp_num(mf_p1); mp_puts(" MFLOP/s (packed lever = "); mp_num(sp_p10/10); mp_puts("."); mp_num(sp_p10%10); mp_puts("x over scalar)\n"); 115 mp_puts(" [3] PACKED x MULTICORE : "); mp_num(mf_pN); mp_puts(" MFLOP/s (stacked = "); mp_num(sp_N10/10); mp_puts("."); mp_num(sp_N10%10); mp_puts("x over scalar)\n"); 116 mp_puts(" GAP TO SILICON f32 PEAK (~1.84 TFLOP/s): "); mp_num(gap_s1); mp_puts("x -> "); mp_num(gap_pN); mp_puts("x (remaining = AVX2 8-wide 2x + FMA 2x + efficiency)\n"); 117 mp_puts(" bit-exact mismatches (packed-MT vs scalar): "); mp_num(mism); mp_puts(" / "); mp_num(SZ*SZ); mp_puts("\n\n"); 118 119 var pass: i64=0 120 var ttl: i64=0 121 ttl=ttl+1; mp_puts(" T1 packed-multicore CORRECT == scalar bit-exact (0 mismatches): "); if mism==0 { pass=pass+1; mp_puts("PASS\n") } else { mp_puts("FAIL\n") } 122 ttl=ttl+1; mp_puts(" T2 packed lever stacks (packed-ST faster than scalar-ST): "); if us_p1<us_s1 { pass=pass+1; mp_puts("PASS\n") } else { mp_puts("FAIL\n") } 123 ttl=ttl+1; mp_puts(" T3 multicore stacks ON packed (packed-MT faster than packed-ST): "); if us_pN<us_p1 { pass=pass+1; mp_puts("PASS\n") } else { mp_puts("FAIL\n") } 124 ttl=ttl+1; mp_puts(" T4 MEASURED climb toward physics (stacked gap shrank >=6x, both levers contributing): "); if gap_s1 >= gap_pN*6 { pass=pass+1; mp_puts("PASS\n") } else { mp_puts("FAIL\n") } 125 126 mp_puts("NX-F32X4-MT-MATMUL-GATE passed "); mp_num(pass); mp_puts("/"); mp_num(ttl) 127 if pass==ttl { mp_puts(" verdict=GREEN (two sovereign levers stacked + MEASURED gap to silicon physics -- the exceed trajectory)\n"); sys_exit(0); return 0 } 128 mp_puts(" verdict=RED\n"); sys_exit(1); return 1 129}