nx_f32x8_mt_matmul.nx source

1// nx_f32x8_mt_matmul.nx -- the FULL sovereign compute stack toward physics: AVX2 8-wide x MULTICORE. 2// __f32x8_dot (256-bit vmovups+vmulps via .byte VEX) inside forked workers (sys_fork+mmap_shared+wait4). 3// Measures scalar-ST -> AVX2-ST -> AVX2-MT and the gap to the derived silicon f32 peak (~1.84 TFLOP/s). 4// This is the deepest "get to exceed" climb with the levers built this session; what remains = FMA (2x, 5// vfmadd231ps, VEX encoder already proven) + better multicore scaling. Bit-exact vs scalar. 6// Sovereign: nx_cc AVX2 + raw fork, NO BLAS/CUDA/OpenMP. No hw writes (Rule 26). expect_exit: 0 tier: ORIGINAL 7import "nx_syscalls.nx" 8const K_MAGIC_1842560: i64 = 1842560 9 10func mp_puts(s: *u8) -> i64 { var n: i64=0; while s[n]!=(0 as u8){n=n+1} sys_write(1,s,n); return 0 } 11func mp_num(v: i64) -> i64 { let b: *u8=sys_mmap(28); var m: i64=v; if m<0{m=0-m;sys_write(1,"-" as *u8,1)} let t: *u8=sys_mmap(28); var k: i64=0; if m==0{t[0]=48 as u8;k=1} while m>0{t[k]=(48+(m%10)) as u8;m=m/10;k=k+1} var i: i64=0; while i<k{b[i]=t[k-1-i];i=i+1} sys_write(1,b,k); return 0 } 12func pack4(buf: *u8, idx: i64, bits: i64) -> i64 { buf[idx*4+0]=(bits) as u8; buf[idx*4+1]=(bits>>8) as u8; buf[idx*4+2]=(bits>>16) as u8; buf[idx*4+3]=(bits>>24) as u8; return 0 } 13 14func band_scalar(a: *i64, b: *i64, c: *i64, M: i64, N: i64, K: i64, w: i64, nw: i64) -> i64 { 15 let r0: i64=w*M/nw 16 let r1: i64=(w+1)*M/nw 17 var i: i64=r0 18 while i<r1 { var j: i64=0 19 while j<N { var acc: i64=__f32_from_i64(0); var l: i64=0 20 while l<K { acc=__f32_add(acc, __f32_mul(a[i*K+l], b[l*N+j])); l=l+1 } 21 c[i*N+j]=acc; j=j+1 } 22 i=i+1 } 23 return 0 24} 25func band_avx2(pa: *u8, pbt: *u8, c: *i64, M: i64, N: i64, K: i64, w: i64, nw: i64) -> i64 { 26 let pab: i64=pa as i64 27 let pbb: i64=pbt as i64 28 let r0: i64=w*M/nw 29 let r1: i64=(w+1)*M/nw 30 var i: i64=r0 31 while i<r1 { var j: i64=0 32 while j<N { var acc: i64=__f32_from_i64(0); var k: i64=0 33 while k<K { acc=__f32_add(acc, __f32x8_dot((pab+(i*K+k)*4) as *u8, (pbb+(j*K+k)*4) as *u8)); k=k+8 } 34 c[i*N+j]=acc; j=j+1 } 35 i=i+1 } 36 return 0 37} 38 39func main() -> i64 { 40 mp_puts("FULL sovereign compute stack toward physics: AVX2 8-wide x MULTICORE (nx_cc + fork, no BLAS)\n\n" as *u8) 41 let SZ: i64=512 42 let NW: i64=16 43 let sa: *i64 = sys_mmap_shared(SZ*SZ*8) as *i64 44 let sb: *i64 = sys_mmap_shared(SZ*SZ*8) as *i64 45 let pa: *u8 = sys_mmap_shared(SZ*SZ*4) 46 let pbt: *u8 = sys_mmap_shared(SZ*SZ*4) 47 let C: *i64 = sys_mmap_shared(SZ*SZ*8) as *i64 48 let C0: *i64 = sys_mmap(SZ*SZ*8) as *i64 49 50 var r: i64=0 51 while r<SZ { var c: i64=0 52 while c<SZ { let v: i64=__f32_from_i64(((r+c)%4)+1); sa[r*SZ+c]=v; sb[r*SZ+c]=v; pack4(pa, r*SZ+c, v); pack4(pbt, c*SZ+r, v); c=c+1 } 53 r=r+1 } 54 let flop: i64 = 2*SZ*SZ*SZ 55 56 let t0: i64=sys_now_us() 57 band_scalar(sa, sb, C0, SZ, SZ, SZ, 0, 1) 58 let t1: i64=sys_now_us() 59 var us_s1: i64=t1-t0 60 if us_s1<=0 { us_s1=1 } 61 62 let t2: i64=sys_now_us() 63 band_avx2(pa, pbt, C, SZ, SZ, SZ, 0, 1) 64 let t3: i64=sys_now_us() 65 var us_a1: i64=t3-t2 66 if us_a1<=0 { us_a1=1 } 67 68 let pids: *i64 = sys_mmap(NW*8) as *i64 69 let t4: i64=sys_now_us() 70 var w: i64=0 71 while w<NW { 72 let pid: i64=sys_fork() 73 if pid==0 { band_avx2(pa, pbt, C, SZ, SZ, SZ, w, NW); sys_exit(0) } else { pids[w]=pid; w=w+1 } 74 } 75 w=0 76 let st: *i64 = sys_mmap(8) as *i64 77 while w<NW { sys_wait4(pids[w], st, 0); w=w+1 } 78 let t5: i64=sys_now_us() 79 var us_aN: i64=t5-t4 80 if us_aN<=0 { us_aN=1 } 81 82 var mism: i64=0 83 var i2: i64=0 84 while i2<SZ*SZ { if C[i2]!=C0[i2] { mism=mism+1 } i2=i2+1 } 85 86 let mf_s1: i64 = flop/us_s1 87 let mf_a1: i64 = flop/us_a1 88 let mf_aN: i64 = flop/us_aN 89 let gap_s1: i64 = K_MAGIC_1842560/mf_s1 90 let gap_aN: i64 = K_MAGIC_1842560/mf_aN 91 var sp_a10: i64 = us_s1*10/us_a1 92 var sp_N10: i64 = us_s1*10/us_aN 93 94 mp_puts(" matmul "); mp_num(SZ); mp_puts("x"); mp_num(SZ); mp_puts("x"); mp_num(SZ); mp_puts(", "); mp_num(NW); mp_puts(" workers\n"); 95 mp_puts(" [1] scalar single-thread : "); mp_num(mf_s1); mp_puts(" MFLOP/s (gap to silicon peak ~"); mp_num(gap_s1); mp_puts("x)\n"); 96 mp_puts(" [2] AVX2 single-thread : "); mp_num(mf_a1); mp_puts(" MFLOP/s (AVX2 lever = "); mp_num(sp_a10/10); mp_puts("."); mp_num(sp_a10%10); mp_puts("x over scalar)\n"); 97 mp_puts(" [3] AVX2 x MULTICORE : "); mp_num(mf_aN); mp_puts(" MFLOP/s (stacked = "); mp_num(sp_N10/10); mp_puts("."); mp_num(sp_N10%10); mp_puts("x over scalar)\n"); 98 mp_puts(" GAP TO SILICON f32 PEAK (~1.84 TFLOP/s): "); mp_num(gap_s1); mp_puts("x -> "); mp_num(gap_aN); mp_puts("x (remaining = FMA 2x + better multicore scaling)\n"); 99 mp_puts(" bit-exact mismatches (AVX2-MT vs scalar): "); mp_num(mism); mp_puts(" / "); mp_num(SZ*SZ); mp_puts("\n\n"); 100 101 var pass: i64=0 102 var ttl: i64=0 103 ttl=ttl+1; mp_puts(" T1 AVX2-multicore CORRECT == scalar bit-exact (0 mismatches): "); if mism==0 { pass=pass+1; mp_puts("PASS\n") } else { mp_puts("FAIL\n") } 104 ttl=ttl+1; mp_puts(" T2 AVX2 lever (AVX2-ST faster than scalar-ST): "); if us_a1<us_s1 { pass=pass+1; mp_puts("PASS\n") } else { mp_puts("FAIL\n") } 105 ttl=ttl+1; mp_puts(" T3 multicore stacks ON AVX2 (AVX2-MT faster than AVX2-ST): "); if us_aN<us_a1 { pass=pass+1; mp_puts("PASS\n") } else { mp_puts("FAIL\n") } 106 ttl=ttl+1; mp_puts(" T4 MEASURED climb toward physics (gap shrank >=10x): "); if gap_s1 >= gap_aN*10 { pass=pass+1; mp_puts("PASS\n") } else { mp_puts("FAIL\n") } 107 108 mp_puts("NX-F32X8-MT-MATMUL-GATE passed "); mp_num(pass); mp_puts("/"); mp_num(ttl) 109 if pass==ttl { mp_puts(" verdict=GREEN (AVX2 8-wide x multicore stacked + MEASURED gap to silicon physics -- deepest exceed climb)\n"); sys_exit(0); return 0 } 110 mp_puts(" verdict=RED\n"); sys_exit(1); return 1 111}