code wiki / _hdl_build / nx_fab_register.nx
nx_fab_register.nx source
↩ module page · 75 lines · 3646 B
1// nx_fab_register.nx -- GOVERNED registration of the fab-slice capability (the Librarian's path, not
2// Claude hand-editing the registry). Evidence is REAL, not asserted: this runner fork/execs the actual
3// /tmp/nx_fab_slice_test.elf and derives the Engineer verdict from the raw wait4 status (signal-kill and
4// non-zero exit both refuse). Council = separation of duties (author_id != admitter_id) + additive-only.
5// Docs = the Scribe's CAPABILITY_CATALOG.md row (checked by open()). Only IG_INGEST writes the CAPREG line.
6// license_tier: ORIGINAL
7import "nx_cap_register.nx"
8import "nx_syscalls.nx"
9
10const FR_LAYER: i64 = 2 // GEN generator (geometry -> toolpath synthesis)
11const FR_STATUS: i64 = 2 // ECO_PROVEN
12const FR_IDX: i64 = 208 // next after CAPREG idx=207
13const FR_NLAYERS: i64 = 6
14
15// fork + execve + wait4 -> raw status (caller splits exit code vs signal)
16func fr_run_status(path: *u8) -> i64 {
17 let pid: i64 = sys_fork()
18 if pid == 0 {
19 let argv: *i64 = sys_mmap(32) as *i64
20 argv[0] = path as i64
21 argv[1] = 0
22 let envp: *i64 = sys_mmap(16) as *i64
23 envp[0] = 0
24 sys_execve(path, argv, envp)
25 sys_exit(127)
26 }
27 let st: *i64 = sys_mmap(16) as *i64
28 sys_wait4(pid, st, 0)
29 return st[0]
30}
31
32func main() -> i64 {
33 // ENGINEER: run the real acceptance gate and read the machine's verdict
34 let elf: *u8 = "/tmp/nx_fab_slice_test.elf" as *u8
35 let probe: i64 = sys_openat_rd(elf)
36 var compiled: i64 = 0
37 var linked: i64 = 0
38 if probe >= 0 { compiled = 1; linked = 1; sys_close(probe) }
39 let raw: i64 = fr_run_status(elf)
40 var ran_no_signal: i64 = 0
41 if (raw % 128) == 0 { ran_no_signal = 1 }
42 var exit_ok: i64 = 0
43 if raw == 0 { exit_ok = 1 }
44 let eng: i64 = ig_engineer(compiled, linked, ran_no_signal, exit_ok)
45 cr_w(1, "ENGINEER verdict=" as *u8); cr_wn(1, eng); cr_w(1, " (1=PASS)\n" as *u8)
46
47 // SCRIBE: the catalog row must exist (the doc was written before registration)
48 let cat: i64 = sys_openat_rd("knowledge/CAPABILITY_CATALOG.md" as *u8)
49 var documented: i64 = 0
50 if cat >= 0 { documented = ig_documented(1, 1); sys_close(cat) }
51 cr_w(1, "SCRIBE documented=" as *u8); cr_wn(1, documented); cr_w(1, "\n" as *u8)
52
53 // COUNCIL: additive-only (new module, nothing removed), author!=admitter (separation of duties)
54 let council: i64 = ig_council(eng, 1, 1, 2)
55 cr_w(1, "COUNCIL admit=" as *u8); cr_wn(1, council); cr_w(1, "\n" as *u8)
56
57 let decision: i64 = ig_decision(eng, council, documented)
58 cr_w(1, "GOVERNED decision=" as *u8); cr_wn(1, decision); cr_w(1, " (1=INGEST)\n" as *u8)
59 if decision != IG_INGEST {
60 cr_w(1, "HELD reason=" as *u8); cr_wn(1, ig_held_reason(eng, council, documented)); cr_w(1, "\n" as *u8)
61 sys_exit(1)
62 }
63
64 // LIBRARIAN: lint + governance gate, then the CAPREG line
65 if cr_can_register(FR_LAYER, FR_STATUS, FR_NLAYERS, decision) != 1 {
66 cr_w(1, "REFUSED reason=" as *u8); cr_wn(1, cr_refusal_reason(FR_LAYER, FR_STATUS, FR_NLAYERS, decision)); cr_w(1, "\n" as *u8)
67 sys_exit(1)
68 }
69 let fd: i64 = sys_openat_append("/tmp/nishi_cap_registry.log" as *u8, 0x1a4)
70 cr_write_entry(fd, FR_IDX, FR_LAYER, "GEN FAB-SLICE rung 1 -- binary STL -> fixed-point um -> z-plane slice -> G-code; the team's first physical-machine driver (electronics-fab arc); 9/9 exact-integer KATs; flagged next: contour chain, perimeter/infill, C-oracle differential, Gerber" as *u8, FR_STATUS)
71 sys_close(fd)
72 cr_w(1, "CAPREG idx=" as *u8); cr_wn(1, FR_IDX); cr_w(1, " REGISTERED\n" as *u8)
73 sys_exit(0)
74 return 0
75}