code wiki / _hdl_build / nx_gateemit_register.nx
`nx_gateemit_register.nx` source

1// nx_gateemit_register.nx -- registers the MATH_GATE emitter via the Librarian.
2// ENGINEER evidence = the emitter re-authors the atan gate from data and the
3// emitted gate passes live, re-run here.
4// license_tier: ORIGINAL
5import "nx_cap_register.nx"
6import "nx_capreg_librarian.nx"
7import "nx_syscalls.nx"
8
9func ger_run(path: *u8) -> i64 {
10    let pid: i64 = sys_fork()
11    if pid == 0 {
12        let dn: i64 = sys_openat_wr("/dev/null" as *u8, 0x1a4)
13        if dn >= 0 { sys_dup3(dn, 1, 0); sys_dup3(dn, 2, 0) }
14        let argv: *i64 = sys_mmap(32) as *i64; argv[0] = path as i64; argv[1] = 0
15        let envp: *i64 = sys_mmap(16) as *i64; envp[0] = 0
16        sys_execve(path, argv, envp); sys_exit(127)
17    }
18    let st: *i64 = sys_mmap(16) as *i64
19    sys_wait4(pid, st, 0)
20    return st[0]
21}
22
23func main() -> i64 {
24    var allok: i64 = 1
25    if ger_run("/tmp/nx_math_gate_demo.sov.elf" as *u8) != 0 { allok = 0 }
26    if ger_run("/tmp/_f64_atan_gate_emitted.sov.elf" as *u8) != 0 { allok = 0 }
27    cr_w(1, "ENGINEER: MATH_GATE emitter re-authors atan gate + emitted gate live pass=" as *u8); cr_wn(1, allok); cr_w(1, "\n" as *u8)
28    let eng: i64 = ig_engineer(1, 1, 1, allok)
29    let dec: i64 = ig_decision(eng, ig_council(eng, 1, 1, 2), 1)
30    if dec != IG_INGEST { cr_w(1, "HELD\n" as *u8); sys_exit(1) }
31    if cr_can_register(5, 2, 6, dec) != 1 { cr_w(1, "REFUSED\n" as *u8); sys_exit(1) }
32    let lp: *u8 = "/tmp/nishi_cap_registry.log" as *u8
33    let jp: *u8 = "knowledge/status/cap_registry_durable.log" as *u8
34    let idx: i64 = cl_next_idx(lp, jp)
35    let ok: i64 = cl_register_dual(lp, jp, idx, 5,
36        2, "GEN MATH_GATE EMITTER (GATE_AUTHORING shape) -- gates join kernels as TEAM-AUTHORED artifacts: nx_math_gate_emit authors a live-oracle ULP gate from a DATA spec (edge raws + 4 band descriptors + fn/oracle names + import list, packed strs/nums 2-arg call under the 6-arg law); helper templates baked in are the session-proven ones (signed-ordered-map ULP, MASKED shifts, banded xorshift). Motivation MEASURED: all 3 defects found while closing ch4 were in HAND-WRITTEN gates never team organs (unmasked >>63 sign-extension, flat identity bars at large args, raw-literal slips 710.0-vs-710.5) -- bug class (1) is now impossible by construction, (3) shrinks to data rows. PROVEN: emitted _f64_atan_gate_emitted reproduces the blessed hand gate's statistics BIT-FOR-BIT (same seed/bands: 322 pts exact=305 ulp1=17 worse=0 max=1) AND detects a tampered kernel (atan(1) table flip: RED worse=5 max=100000) AND returns GREEN after team regeneration. NEXT: swap math_rungs.tsv ugate column to emitted gates rung-by-rung; pair-function template (sincos/sinhcosh shapes); oracle self-anchor gates stay bespoke (identity choice = novel-core work). Composes CAPREG307/372" as *u8)
37    if ok != 1 { cr_w(1, "DUAL-WRITE FAILED\n" as *u8); sys_exit(1) }
38    cr_w(1, "CAPREG idx=" as *u8); cr_wn(1, idx); cr_w(1, " REGISTERED (MATH_GATE emitter)\n" as *u8)
39    sys_exit(0)
40    return 0
41}
nx_gateemit_register.nx source

`nx_gateemit_register.nx` source
