nx_gpu_power_gate.nx source

1// nx_gpu_power_gate.nx -- gate for the sovereign GPU power/thermal governor (nx_gpu_power) = the NEVER-FRY rung. 2// KATs the governor logic on the REAL 5080 range (pmin=5W, pmax=175W; thermal warn=75C, crit=90C): clamp, 3// thermal-derate, and the load-bearing EMERGENCY cap (at/above critical temp -> minimum power = can't fry). 4// Pure integer logic, locally verifiable; applying the cap = device shim RM_CONTROL / nvidia-smi (cloud/admin). 5// No hw writes (Rule 26). expect_exit: 0 license_tier: ORIGINAL 6import "nx_syscalls.nx" 7import "nx_gpu_power.nx" 8import "nx_gate_verdict.nx" 9 10func bp(s: *u8) -> i64 { var n: i64=0; while s[n]!=(0 as u8){n=n+1} sys_write(1,s,n); return 0 } 11func bn(v: i64) -> i64 { let bb: *u8=sys_mmap(28); var m: i64=v; if m<0{m=0-m;sys_write(1,"-" as *u8,1)} let t: *u8=sys_mmap(28); var k: i64=0; if m==0{t[0]=48 as u8;k=1} while m>0{t[k]=(48+(m%10)) as u8;m=m/10;k=k+1} var i: i64=0; while i<k{bb[i]=t[k-1-i];i=i+1} sys_write(1,bb,k); return 0 } 12func bd(v: i64) -> i64 { let p: *u8=sys_mmap(1); p[0]=(48+v) as u8; sys_write(1,p,1); return 0 } 13 14func chk(name: *u8, got: i64, ref: i64, st: *i64) -> i64 { 15 bp(" " as *u8); bp(name); bp(" -> " as *u8); bn(got); bp("W" as *u8) 16 if got==ref { bp(" == expect PASS\n" as *u8); st[0]=st[0]+1; return 0 } 17 bp(" != expect " as *u8); bn(ref); bp(" FAIL\n" as *u8); return 0 18} 19 20func main() -> i64 { 21 bp("=== sovereign GPU power/thermal governor (nx_gpu_power) -- NEVER-FRY by construction (rule #26) ===\n" as *u8) 22 bp(" real 5080 range: pmin=5W pmax=175W default=80W; policy warn=75C crit=90C\n" as *u8) 23 let st: *i64 = sys_mmap(8); st[0]=0 24 chk("cool 100W@50C (pass-through) " as *u8, nx_power_governor(100, 5, 175, 50, 75, 90), 100, st) 25 chk("clamp-to-max 200W@50C " as *u8, nx_power_governor(200, 5, 175, 50, 75, 90), 175, st) 26 chk("clamp-to-min 2W@50C " as *u8, nx_power_governor(2, 5, 175, 50, 75, 90), 5, st) 27 chk("derate 100W@82C (warn band) " as *u8, nx_power_governor(100, 5, 175, 82, 75, 90), 56, st) 28 chk("EMERGENCY 100W@92C NEVER-FRY " as *u8, nx_power_governor(100, 5, 175, 92, 75, 90), 5, st) 29 30 // negative control: a HOT GPU must NOT keep full power (the governor MUST reduce it) 31 var neg_ok: i64 = 0 32 if nx_power_governor(100, 5, 175, 92, 75, 90) < 100 { neg_ok = 1 } 33 bp(" NEG hot-GPU power reduced (not full): " as *u8); if neg_ok==1 { bp("PASS\n" as *u8) } else { bp("FAIL\n" as *u8) } 34 // locked-clock target for reproducible bench (75% of 3090MHz max) 35 bp(" locked-clock target 75% of 3090MHz = " as *u8); bn(nx_clock_lock_target(3090, 75)); bp("MHz\n" as *u8) 36 37 let pass: i64 = st[0] 38 bp("GPU-POWER-GATE passed " as *u8); bd(pass); bp("/5 neg=" as *u8); bd(neg_ok); bp("\n" as *u8) 39 // MIGRATED onto nx_gate_verdict by nx_gate_dry_apply (D001, minimal form): every check 40 // row above is untouched, so the PASS/FAIL vector cannot change; only the hand-rolled 41 // verdict emission is replaced by the ONE shared base class. Proven by nx_gate_migrate verify. 42 let ctr__dry: *i64 = gv_ctr() 43 ctr__dry[0] = pass 44 ctr__dry[1] = 5 45 let rc__dry: i64 = gv_verdict("GPU-POWER-GATE" as *u8, ctr__dry, "never-fry power/thermal governor: clamp + thermal-derate + EMERGENCY-cap-at-critical-temp, integer/deterministic. Apply via device-shim RM_CONTROL / nvidia-smi = device step)" as *u8) 46 sys_exit(rc__dry) 47 return rc__dry 48}