nx_intra_pred_gate.nx source

1// nx_intra_pred_gate.nx -- MEASURES the directional-intra-prediction lever on REAL content before any core-codec change. 2// On the real 768x768 H.264-decoded luma frame, for every interior 4x4 block, compare the residual SAD of DC-only 3// prediction (what the codec does today) vs the best of {DC, vertical, horizontal, diagonal-down-right}. The reduction 4// is how much smaller the residual that must be entropy-coded becomes -- the first-order size of the intra win. 5// HONEST: predicts from ORIGINAL neighbor samples (an upper bound; a real codec predicts from reconstructed neighbors), 6// so this bounds the available gain rather than the exact post-quant bitrate. Reusable lib nx_intra_pred is the org. 7import "nx_syscalls.nx" 8import "nx_gate_emit_lib.nx" 9import "nx_intra_pred.nx" 10import "nx_gate_verdict.nx" 11 12func main() -> i64 { 13 g_puts("nx_intra_pred gate (directional intra prediction residual reduction on a REAL frame, MEASURED)\n" as *u8) 14 var pass: i64 = 0; var total: i64 = 0 15 16 let box: *i64 = sys_mmap(16) as *i64 17 let yuv: *u8 = sys_read_file("/mnt/c/Users/elder/nishi-core/nxc2/knowledge/staging/media/ref_frame0.yuv" as *u8, box) 18 if (yuv as i64) == 0 { g_puts(" FAIL cannot read ref_frame0.yuv\n" as *u8); g_puts("verdict=RED\n" as *u8); sys_exit(1); return 1 } 19 let W: i64 = 768; let H: i64 = 768; let N: i64 = W*H 20 pass = pass + g_check("real asset present" as *u8, box[0] >= N); total=total+1 21 if box[0] < N { g_puts("verdict=RED\n" as *u8); sys_exit(1); return 1 } 22 let src: *u8 = yuv // real luma plane 23 24 let pred: *u8 = sys_mmap(16) as *u8 25 let mode: *i64 = sys_mmap(8) as *i64 26 let cnt: *i64 = sys_mmap(IP_NMODES*8) as *i64 27 var ci: i64 = 0; while ci < IP_NMODES { cnt[ci]=0; ci=ci+1 } 28 29 var dc_total: i64 = 0; var best_total: i64 = 0; var nblk: i64 = 0 30 var py: i64 = 4 31 while py + 4 <= H { 32 var px: i64 = 4 33 while px + 4 <= W { 34 ip_predict4(src, W, px, py, IP_DC, pred) 35 dc_total = dc_total + ip_sad4(src, W, px, py, pred) 36 best_total = best_total + ip_best4(src, W, px, py, pred, mode) 37 cnt[mode[0]] = cnt[mode[0]] + 1 38 nblk = nblk + 1 39 px = px + 4 40 } 41 py = py + 4 42 } 43 44 let red: i64 = ((dc_total - best_total) * 100) / dc_total 45 g_puts(" [measure] blocks=" as *u8); g_pn(nblk); g_puts(" DC-only residual SAD=" as *u8); g_pn(dc_total) 46 g_puts(" best-of-4 SAD=" as *u8); g_pn(best_total); g_puts(" reduction=" as *u8); g_pn(red); g_puts("%\n" as *u8) 47 g_puts(" [measure] mode picks: DC=" as *u8); g_pn(cnt[IP_DC]); g_puts(" V=" as *u8); g_pn(cnt[IP_V]) 48 g_puts(" H=" as *u8); g_pn(cnt[IP_H]); g_puts(" DDR=" as *u8); g_pn(cnt[IP_DDR]) 49 g_puts(" (HONEST: predicted from original neighbors = upper bound on the gain)\n" as *u8) 50 51 pass = pass + g_check("best-of-4 never worse than DC-only (mode selection is sound)" as *u8, best_total <= dc_total); total=total+1 52 pass = pass + g_check("directional prediction cuts intra residual >= 15% on real content" as *u8, red >= 15); total=total+1 53 pass = pass + g_check("directional modes are actually chosen (V+H+DDR picked somewhere)" as *u8, (cnt[IP_V]+cnt[IP_H]+cnt[IP_DDR]) > 0); total=total+1 54 55 g_puts("---- intra_pred gate: passed " as *u8); g_pn(pass); g_puts(" / " as *u8); g_pn(total); g_puts(" ----\n" as *u8) 56 // MIGRATED onto nx_gate_verdict by nx_gate_dry_apply (D001, minimal form): every check 57 // row above is untouched, so the PASS/FAIL vector cannot change; only the hand-rolled 58 // verdict emission is replaced by the ONE shared base class. Proven by nx_gate_migrate verify. 59 let ctr__dry: *i64 = gv_ctr() 60 ctr__dry[0] = pass 61 ctr__dry[1] = total 62 let rc__dry: i64 = gv_verdict("INTRA-PRED-GATE" as *u8, ctr__dry, "teeth unchanged; verdict emission migrated onto the shared base class" as *u8) 63 sys_exit(rc__dry) 64 return rc__dry 65}