code wiki / _hdl_build / nx_nishios_window.nx
nx_nishios_window.nx source
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1// nx_nishios_window.nx -- "see NishiOS in a window": boot the kernel on the SOVEREIGN rv64 emulator
2// (same device-model runtime as nx_boot_run_sov; qemu stays alignment-only) and EMIT a styled HTML
3// "NishiOS boot console" -- a CRT-style screen showing the UART output + the hardware state (halt
4// code, steps, device models). The operator opens it in a browser window to SEE the OS boot and
5// test from the hardware rung up. HTML is emitted BY a Nishi organ (sovereign web doctrine).
6// writes knowledge/status/nishios_screen.html
7// No persistent-hardware writes -- the emulator's host-mode writes are inert by construction (Rule 26).
8// license_tier: ORIGINAL
9import "rv64im_min_sim.nx"
10import "rv64im_min_csr.nx"
11import "rv64im_min_clint.nx"
12import "rv64im_min_uart.nx"
13import "rv64im_min_virtio.nx"
14import "rv64im_min_nvme.nx"
15const NW_MAGIC_16384: i64 = 16384
16
17const NW_MEM_BASE: i64 = 0x80000000
18const NW_MEM_SIZE: i64 = 65536
19const NW_TX_CAP: i64 = 4096
20const NW_MAX_STEPS: i64 = 100000
21
22func nw_p(s: *u8) -> i64 { var n: i64=0; while s[n]!=(0 as u8){n=n+1} sys_write(1,s,n); return 0 }
23func wa(buf: *u8, off: i64, s: *u8) -> i64 { var i: i64=0; while s[i]!=(0 as u8){ buf[off+i]=s[i]; i=i+1 } return off+i }
24func wb(buf: *u8, off: i64, src: *u8, n: i64) -> i64 { var i: i64=0; while i<n { buf[off+i]=src[i]; i=i+1 } return off+i }
25func wn(buf: *u8, off: i64, v: i64) -> i64 { var o: i64=off; if v==0 { buf[o]=48 as u8; return o+1 } let t: *u8=sys_mmap(28); var m: i64=v; var k: i64=0; while m>0 { t[k]=(48+(m%10)) as u8; m=m/10; k=k+1 } var i: i64=0; while i<k { buf[o+i]=t[k-1-i]; i=i+1 } return o+k }
26
27func main() -> i64 {
28 let binp: *u8 = "runtime/_hdl_build/_boot_nishi_virt.bin" as *u8
29 let lenp: *i64 = sys_mmap(16) as *i64
30 let img: *u8 = sys_read_file(binp, lenp)
31 let ilen: i64 = lenp[0]
32 if ilen <= 0 { nw_p("NISHIOS-WINDOW RED reason=binary-missing\n" as *u8); sys_exit(1); return 1 }
33
34 let rf_storage: *i64 = (sys_mmap(8 * NX_RV64IM_RF_N_REGS)) as *i64
35 let csr_storage: *i64 = (sys_mmap(8 * NX_CSR_SLOT_N)) as *i64
36 let clint_storage: *i64 = (sys_mmap(8 * NX_CLINT_SLOT_N)) as *i64
37 let uart_storage: *i64 = (sys_mmap(8 * NX_UART_SLOT_N)) as *i64
38 let virtio_storage:*i64 = (sys_mmap(8 * NX_VIRTIO_SLOT_N)) as *i64
39 let vnet_storage: *i64 = (sys_mmap(8 * NX_VIRTIO_SLOT_N)) as *i64
40 let nvme_storage: *i64 = (sys_mmap(8 * NX_NVME_SLOT_N)) as *i64
41 let nndev_storage: *i64 = (sys_mmap(8 * NX_NNDEV_SLOT_N)) as *i64
42 let mmu_storage: *i64 = (sys_mmap(8 * NX_MMU_SLOT_N)) as *i64
43 let mem: *u8 = sys_mmap(NW_MEM_SIZE)
44 let tx_buf: *u8 = sys_mmap(NW_TX_CAP)
45 let rf: *NxRv64imRegfile = (sys_mmap(64)) as *NxRv64imRegfile
46 let csr: *NxRv64imCsrFile = (sys_mmap(64)) as *NxRv64imCsrFile
47 let clint: *NxClint = (sys_mmap(64)) as *NxClint
48 let uart: *NxUart = (sys_mmap(64)) as *NxUart
49 let virtio:*NxVirtioMmio = (sys_mmap(64)) as *NxVirtioMmio
50 let vnet: *NxVirtioMmio = (sys_mmap(64)) as *NxVirtioMmio
51 let nvme: *NxNvmeCtrl = (sys_mmap(64)) as *NxNvmeCtrl
52 let nndev: *NxNnDev = (sys_mmap(64)) as *NxNnDev
53 let mmu: *NxMmu = (sys_mmap(64)) as *NxMmu
54 let sim: *NxRv64imSim = (sys_mmap(128)) as *NxRv64imSim
55
56 nx_rv64im_rf_init(rf, rf_storage)
57 nx_rv64im_csr_init(csr, csr_storage, 0)
58 nx_clint_init(clint, clint_storage)
59 nx_uart_init(uart, uart_storage, tx_buf, NW_TX_CAP)
60 nx_virtio_init(virtio, virtio_storage)
61 nx_virtio_init_net(vnet, vnet_storage)
62 nx_nvme_init(nvme, nvme_storage)
63 nx_nndev_init(nndev, nndev_storage)
64 nx_mmu_init(mmu, mmu_storage)
65 nx_rv64im_sim_init(sim, rf, csr, clint, uart, NW_MEM_BASE, mem, NW_MEM_SIZE, 0)
66 nx_rv64im_sim_attach_virtio(sim, virtio)
67 nx_rv64im_sim_attach_virtio_net(sim, vnet)
68 nx_rv64im_sim_attach_nvme(sim, nvme)
69 nx_rv64im_sim_attach_nndev(sim, nndev)
70 nx_rv64im_sim_attach_mmu(sim, mmu)
71
72 var i: i64 = 0
73 while i < ilen { mem[i] = img[i]; i = i + 1 }
74 nx_rv64im_sim_run(sim, NW_MAX_STEPS)
75 let cnt: i64 = nx_uart_tx_count(uart)
76 var ok: i64 = 0
77 if sim.halted == 1 { if sim.halt_code == 0 { ok = 1 } }
78
79 // ---- emit the HTML "NishiOS boot console" window ----
80 let html: *u8 = sys_mmap(NW_MAGIC_16384)
81 var o: i64 = 0
82 o = wa(html, o, "<!doctype html><html><head><meta charset=utf-8><title>NishiOS - sovereign rv64</title><style>" as *u8)
83 o = wa(html, o, "body{background:#070707;color:#3f6;font-family:ui-monospace,monospace;margin:0;padding:28px}" as *u8)
84 o = wa(html, o, ".crt{max-width:840px;margin:0 auto;border:2px solid #1a5;border-radius:10px;padding:22px;box-shadow:0 0 30px #0f433a inset}" as *u8)
85 o = wa(html, o, "h1{color:#7fd;font-size:14px;letter-spacing:3px;margin:0 0 14px}" as *u8)
86 o = wa(html, o, ".scr{background:#000;border:1px solid #094;border-radius:5px;padding:18px;min-height:90px;white-space:pre-wrap;font-size:20px;text-shadow:0 0 7px #2f6}" as *u8)
87 o = wa(html, o, ".hud{margin-top:16px;color:#9fb;font-size:12px;line-height:1.7}.ok{color:#5f8;font-weight:700}.bad{color:#f55;font-weight:700}.dim{color:#6a8}" as *u8)
88 o = wa(html, o, "</style></head><body><div class=crt><h1>NISHIOS · SOVEREIGN rv64 EMULATOR · BOOT CONSOLE</h1><div class=scr>[UART] " as *u8)
89 o = wb(html, o, tx_buf, cnt)
90 o = wa(html, o, "</div><div class=hud>verdict: " as *u8)
91 if ok == 1 { o = wa(html, o, "<span class=ok>GREEN</span> — clean finisher halt" as *u8) } else { o = wa(html, o, "<span class=bad>RED</span> — no clean halt" as *u8) }
92 o = wa(html, o, "<br>halt_code: " as *u8); o = wn(html, o, sim.halt_code)
93 o = wa(html, o, " · steps: " as *u8); o = wn(html, o, sim.steps)
94 o = wa(html, o, " · uart_bytes: " as *u8); o = wn(html, o, cnt)
95 o = wa(html, o, "<br><span class=dim>device model: 16550 UART · CLINT · M-mode CSR · virtio · virtio-net · nvme · SV39 MMU</span>" as *u8)
96 o = wa(html, o, "<br><span class=dim>runtime = Nishi rv64 silicon model (qemu = alignment cross-check only, never the runtime)</span>" as *u8)
97 o = wa(html, o, "<br><span class=dim>never-brick: emulator host-mode writes inert by construction (Rule 26)</span>" as *u8)
98 o = wa(html, o, "</div></div></body></html>" as *u8)
99
100 let fd: i64 = sys_openat_wr("knowledge/status/nishios_screen.html" as *u8, 0x1a4)
101 if fd <= 0 { nw_p("NISHIOS-WINDOW RED reason=cannot-write-html\n" as *u8); sys_exit(1); return 1 }
102 sys_write(fd, html, o)
103 sys_close(fd)
104
105 nw_p("NISHIOS-WINDOW wrote knowledge/status/nishios_screen.html bytes=" as *u8)
106 let nb: *u8 = sys_mmap(16); let no: i64 = wn(nb, 0, o); sys_write(1, nb, no)
107 nw_p(" (open it in a browser to SEE the boot)\n" as *u8)
108 if ok == 1 { nw_p("NISHIOS-WINDOW verdict=GREEN\n" as *u8); sys_exit(0); return 0 }
109 nw_p("NISHIOS-WINDOW verdict=RED\n" as *u8); sys_exit(1); return 1
110}