nx_pardl_gate.nx source

1import "nx_gate_base.nx" 2// nx_pardl_gate.nx -- proves PARALLEL download AND MEASURES it (the performance axis, not a checkbox): time 3// the same 12-fragment download serial (concurrency=1) vs parallel (concurrency=4) and REPORT the speedup; 4// assert >=2x (real parallelism) AND that every fragment is downloaded + integrity-verified either way. This 5// is what "capturing performance as an axis" looks like: a measured number, and a regression bound. license_tier: ORIGINAL expect_exit: 0 6import "nx_syscalls.nx" 7import "nx_robust_dl.nx" 8import "nx_pardl.nx" 9import "nx_gate_verdict.nx" 10 11func grow(name: *u8, ok: i64) -> i64 { if ok==1 { gw(" PASS " as *u8) } else { gw(" FAIL " as *u8) } gw(name); gw(" 12" as *u8); return ok } 13func gn(v: i64) -> i64 { let b: *u8=sys_mmap(24); var m: i64=v; if m<0{gw("-" as *u8);m=0-m} let t: *u8=sys_mmap(24); var k: i64=0; if m==0{t[0]=48 as u8;k=1} while m>0{t[k]=(48+(m%10)) as u8;m=m/10;k=k+1} var i: i64=0; while i<k{b[i]=t[k-1-i];i=i+1} sys_write(1,b,k); return 0 } 14 15func main() -> i64 { 16 gw("pardl SOVEREIGN gate (parallel fragment download -- MEASURED serial vs 4-way speedup + integrity)\n" as *u8) 17 var pass: i64 = 0 18 var ttl: i64 = 0 19 20 let nfrags: i64 = 12 21 let fragcap: i64 = 512 22 let latency: i64 = 50 23 let sharedbuf: *u8 = sys_mmap_shared(nfrags * fragcap) // children write here (MAP_SHARED) 24 let state1: *u8 = sys_mmap(64) 25 let state2: *u8 = sys_mmap(64) 26 var z: i64 = 0; while z < 64 { state1[z] = 0 as u8; state2[z] = 0 as u8; z = z + 1 } 27 28 // SERIAL (concurrency 1) 29 let t0: i64 = sys_clock_now_us() 30 let d1: i64 = pdl_download(nfrags, fragcap, 1, latency, sharedbuf, state1) 31 let t1: i64 = sys_clock_now_us() 32 let serial_us: i64 = t1 - t0 33 34 // PARALLEL (concurrency 4) 35 let t2: i64 = sys_clock_now_us() 36 let d2: i64 = pdl_download(nfrags, fragcap, 4, latency, sharedbuf, state2) 37 let t3: i64 = sys_clock_now_us() 38 let par_us: i64 = t3 - t2 39 40 gw(" MEASURED: serial=" as *u8); gn(serial_us / 1000); gw("ms parallel(4)=" as *u8); gn(par_us / 1000); gw("ms\n" as *u8) 41 var sx: i64 = 0 42 if par_us > 0 { sx = (serial_us * 100) / par_us } 43 gw(" SPEEDUP = " as *u8); gn(sx / 100); gw("." as *u8); let frac: i64 = sx - (sx/100)*100; if frac < 10 { gw("0" as *u8) } gn(frac); gw("x (12 frags @ " as *u8); gn(latency); gw("ms, 4-way)\n" as *u8) 44 45 ttl=ttl+1; pass=pass+grow("C1 serial downloaded all 12 (integrity-ok)\x00" as *u8, (d1 == 12) as i64) 46 ttl=ttl+1; pass=pass+grow("C2 parallel downloaded all 12 (integrity-ok)\x00" as *u8, (d2 == 12) as i64) 47 ttl=ttl+1; pass=pass+grow("C3 parallel >= 2x faster than serial (real parallelism)\x00" as *u8, ((par_us * 2) < serial_us) as i64) 48 // C4: resume-state fully marked under parallelism (composes with resume) 49 var s4: i64 = 1; var i4: i64 = 0 50 while i4 < nfrags { if (state2[i4] & 0xff) != 1 { s4 = 0 } i4 = i4 + 1 } 51 ttl=ttl+1; pass=pass+grow("C4 resume-state all 12 marked (parallel + resume compose)\x00" as *u8, s4) 52 53 gw("pass=" as *u8); gn(pass); gw("/" as *u8); gn(ttl); gw("\n" as *u8) 54 // MIGRATED onto nx_gate_verdict by nx_gate_dry_apply (D001, minimal form): every check 55 // row above is untouched, so the PASS/FAIL vector cannot change; only the hand-rolled 56 // verdict emission is replaced by the ONE shared base class. Proven by nx_gate_migrate verify. 57 let ctr__dry: *i64 = gv_ctr() 58 ctr__dry[0] = pass 59 ctr__dry[1] = ttl 60 let rc__dry: i64 = gv_verdict("PARDL-GATE" as *u8, ctr__dry, "parallelism MEASURED as a speedup axis; integrity+resume intact)" as *u8) 61 sys_exit(rc__dry) 62 return rc__dry 63}