code wiki / _hdl_build / nx_pattern_classify_test.nx
nx_pattern_classify_test.nx source
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1// nx_pattern_classify_test.nx -- ENGINEER's gate: the classifier must route the session's 10 REAL
2// module shapes to their patterns from FEATURES ALONE (no shape_id), refuse the genuinely novel, and
3// resolve overlaps by the table's order policy. license_tier: ORIGINAL
4import "nx_pattern_classify.nx"
5import "nx_syscalls.nx"
6
7func tc_w(s: *u8) -> i64 { var n: i64=0; while s[n]!=(0 as u8){n=n+1} sys_write(1,s,n); return 0 }
8func tc_wn(v: i64) -> i64 { let bb: *u8=sys_mmap(28); var m: i64=v; if m==0{sys_write(1,"0" as *u8,1); return 0} let t: *u8=sys_mmap(28); var k: i64=0; while m>0{t[k]=(48+(m%10)) as u8;m=m/10;k=k+1} var i: i64=0; while i<k{bb[i]=t[k-1-i];i=i+1} sys_write(1,bb,k); return 0 }
9
10// build a vector with up to 3 traits set (-1 = unused)
11func tc_vec(a: i64, b: i64, c: i64) -> *i64 {
12 let f: *i64 = plc_new_features()
13 if a >= 0 { f[a] = 1 }
14 if b >= 0 { f[b] = 1 }
15 if c >= 0 { f[c] = 1 }
16 return f
17}
18
19func main() -> i64 {
20 var pass: i64 = 0
21 // the session's 10 REAL modules, classified from features alone:
22 // jam_check: thresholds -> verdict
23 if plc_classify(tc_vec(PLC_OUT_VERDICT, 0-1, 0-1)) == PL_VERDICT_GATE { pass = pass + 1 }
24 // claim_extract: bytes -> value
25 if plc_classify(tc_vec(PLC_IN_BYTES, PLC_OUT_VALUE, 0-1)) == PL_PARSER_KAT { pass = pass + 1 }
26 // referee: a vs b -> winner
27 if plc_classify(tc_vec(PLC_IN_PAIR, PLC_OUT_VERDICT, 0-1)) == PL_COMPARATOR { pass = pass + 1 }
28 // jam capacity curve: table -> interpolated value
29 if plc_classify(tc_vec(PLC_IN_TABLE, PLC_OUT_VALUE, 0-1)) == PL_THRESHOLD_TABLE { pass = pass + 1 }
30 // metrology deviation: array fold -> metric (NOT parser: no byte input)
31 if plc_classify(tc_vec(PLC_IN_ARRAY, PLC_OUT_VALUE, 0-1)) == PL_ACCUMULATOR { pass = pass + 1 }
32 // polite_crawl: pacing over per-host state (NOT pid: no plant)
33 if plc_classify(tc_vec(PLC_HAS_TIME, PLC_IN_STATE, 0-1)) == PL_GOVERNOR { pass = pass + 1 }
34 // build_pipeline: transitions table -> next-state verdict
35 if plc_classify(tc_vec(PLC_IN_TABLE, PLC_OUT_VERDICT, 0-1)) == PL_STATE_FLOW { pass = pass + 1 }
36 // scaffold_author: emits modules (meta)
37 if plc_classify(tc_vec(PLC_IS_META, 0-1, 0-1)) == PL_SCAFFOLD { pass = pass + 1 }
38 // mask_geom: nm coords + DRC verdict (GEOMETRY outranks bare verdict)
39 if plc_classify(tc_vec(PLC_IN_COORDS, PLC_OUT_VERDICT, 0-1)) == PL_GEOMETRY { pass = pass + 1 }
40 // heater_pid: plant feedback + carried integral
41 if plc_classify(tc_vec(PLC_HAS_PLANT, PLC_IN_STATE, PLC_OUT_VALUE)) == PL_PID_LOOP { pass = pass + 1 }
42 // ---- policy + honesty KATs ----
43 // empty spec -> NOVEL (needs tutor, never guessed)
44 if plc_classify(plc_new_features()) == 0 { pass = pass + 1 }
45 // plant+time+state -> PID outranks GOVERNOR (table order = the policy)
46 if plc_classify(tc_vec(PLC_HAS_PLANT, PLC_IN_STATE, PLC_HAS_TIME)) == PL_PID_LOOP { pass = pass + 1 }
47 // table emitting both a verdict and a value -> STATE_FLOW outranks THRESHOLD_TABLE
48 if plc_classify(tc_vec(PLC_IN_TABLE, PLC_OUT_VERDICT, PLC_OUT_VALUE)) == PL_STATE_FLOW { pass = pass + 1 }
49 // a pure value function with no recognized input trait (e.g. a hash) -> NOVEL, honest
50 if plc_classify(tc_vec(PLC_OUT_VALUE, 0-1, 0-1)) == 0 { pass = pass + 1 }
51 // plc_match_spec agrees with the library coverage contract
52 if plc_match_spec(tc_vec(PLC_IN_BYTES, PLC_OUT_VALUE, 0-1)) == PL_PARSER_KAT { pass = pass + 1 }
53 // ---- shapes 11-14 (the post-census growth rungs, synced after nx_classifier_sync caught drift) ----
54 // f64 log kernel: oracle-generated coefficient spec
55 if plc_classify(tc_vec(PLC_IN_COEFFS, PLC_OUT_VALUE, 0-1)) == PL_MATH_KERNEL { pass = pass + 1 }
56 // TLS-extension walker: framed binary, no field table
57 if plc_classify(tc_vec(PLC_IN_FRAMED, 0-1, 0-1)) == PL_WIRE_TLV { pass = pass + 1 }
58 // handshake field-sequence walker: framed binary FROM a field table (outranks bare WIRE_TLV)
59 if plc_classify(tc_vec(PLC_IN_FRAMED, PLC_IN_TABLE, 0-1)) == PL_STRUCT_WALK { pass = pass + 1 }
60 // race lane program: emits a program AROUND a framed core (outranks bare SCAFFOLD)
61 if plc_classify(tc_vec(PLC_IS_META, PLC_IN_FRAMED, 0-1)) == PL_IO_CONTRACT { pass = pass + 1 }
62 // JPEG marker stream: prefix+standalone-table grammar (shape 15, the live-caught drift)
63 if plc_classify(tc_vec(PLC_IN_MARKED, 0-1, 0-1)) == PL_WIRE_MARKER { pass = pass + 1 }
64 // NV1 LPC residual coder: array in + exact-inverse law (shape 16, grown from the NV2 rung)
65 if plc_classify(tc_vec(PLC_IN_ARRAY, PLC_HAS_INVERSE, 0-1)) == PL_PREDICTOR_CODER { pass = pass + 1 }
66 // an array WITHOUT the inverse law still folds to ACCUMULATOR (row order = the policy)
67 if plc_classify(tc_vec(PLC_IN_ARRAY, 0-1, 0-1)) == PL_ACCUMULATOR { pass = pass + 1 }
68 // coverage probe spans the whole census (the sync gate's contract). Track
69 // pl_n_patterns() instead of a hardcoded count: the literal went stale on
70 // every library growth (16 broke when emit12 landed shape 17); emitter-vs-
71 // census drift is the SYNC GATE's job, this KAT pins classifier==census.
72 if plc_max_covered() == pl_n_patterns() { pass = pass + 1 }
73 // and the new TEMPLATE_TABLE route: table-driven + payload bytes -> 17
74 if plc_classify(tc_vec(PLC_IN_TABLE, PLC_IN_BYTES, 0-1)) == PL_TEMPLATE_TABLE { pass = pass + 1 }
75
76 tc_w("CLASSIFIER KATs passed=" as *u8); tc_wn(pass); tc_w("/24\n" as *u8)
77 if pass == 24 { sys_exit(0) }
78 sys_exit(1)
79 return 1
80}