code wiki / _hdl_build / nx_pattern_emit13_register.nx
nx_pattern_emit13_register.nx source
↩ module page · 40 lines · 3362 B
1// nx_pattern_emit13_register.nx -- records STATE_MACHINE (shape 18) + its first composition.
2// Engineer gate = team-authored machine KATs green + the TLS flight-order composition gate 8/8.
3// Librarian alloc + dual-write. license_tier: ORIGINAL
4import "nx_cap_register.nx"
5import "nx_capreg_librarian.nx"
6import "nx_syscalls.nx"
7
8func p13r_run(path: *u8) -> i64 {
9 let pid: i64 = sys_fork()
10 if pid == 0 {
11 let dn: i64 = sys_openat_wr("/dev/null" as *u8, 0x1a4)
12 if dn >= 0 { sys_dup3(dn, 1, 0); sys_dup3(dn, 2, 0) }
13 let argv: *i64 = sys_mmap(32) as *i64; argv[0] = path as i64; argv[1] = 0
14 let envp: *i64 = sys_mmap(16) as *i64; envp[0] = 0
15 sys_execve(path, argv, envp); sys_exit(127)
16 }
17 let st: *i64 = sys_mmap(16) as *i64
18 sys_wait4(pid, st, 0)
19 return st[0]
20}
21
22func main() -> i64 {
23 var allok: i64 = 1
24 if p13r_run("/tmp/_pe_tlshs_test.sov.elf" as *u8) != 0 { allok = 0 }
25 if p13r_run("/tmp/nx_tls_hs_order_gate.sov.elf" as *u8) != 0 { allok = 0 }
26 cr_w(1, "ENGINEER: authored-machine KATs + composition gate pass=" as *u8); cr_wn(1, allok); cr_w(1, "\n" as *u8)
27 let eng: i64 = ig_engineer(1, 1, 1, allok)
28 let dec: i64 = ig_decision(eng, ig_council(eng, 1, 1, 2), 1)
29 if dec != IG_INGEST { cr_w(1, "HELD\n" as *u8); sys_exit(1) }
30 if cr_can_register(5, 2, 6, dec) != 1 { cr_w(1, "REFUSED\n" as *u8); sys_exit(1) }
31 let lp: *u8 = "/tmp/nishi_cap_registry.log" as *u8
32 let jp: *u8 = "knowledge/status/cap_registry_durable.log" as *u8
33 let idx: i64 = cl_next_idx(lp, jp)
34 let ok: i64 = cl_register_dual(lp, jp, idx, 5,
35 2, "SELF PATTERN-EMIT-13 STATE_MACHINE (shape 18) -- the FIRST rung of the advanced-stack ladders (spec 2026-06-10: DirectX-class pipeline validation, CUDA-class queue lifecycles, Klipper-class G-code modal interpreters, TLS/session flight order are all this shape). Builder authors a deterministic FSM from a transition table (spec = nstates/nevents/s0 + flat next-state table, -1 = undefined): <name>_step baked as straight-line ifs (no runtime table interpreter, rule 22) with out-of-range refusal; <name>_run folds an event array and refuses the moment any step refuses. EMIT-TIME RAILS proven: table value past nstates REFUSED, s0 out of range REFUSED; KATs computed from the table (greedy defined-transition walk + undefined refusal + out-of-range refusal + determinism). FIRST COMPOSITION: _pe_tlshs = TLS 1.3 server-flight ORDER VALIDATOR (6 states x 5 events, only the canonical chain defined) -- nx_tls_hs_order_gate 8/8 GREEN: canonical flight CONNECTS, ALL 4 adjacent reorders REFUSED, truncation does NOT connect, replay-after-connect REFUSED, skip-cert-verify REFUSED = the browser arc out-of-order-handshake security property as an authored gateable core. CENSUS SYNCED same-session: library PL_STATE_MACHINE=18, classifier route (IN_TABLE+IN_STATE, ordered BEFORE STATE_FLOW -- index order is policy), classifier KATs 24/24, CLSYNC 18/18/18 GREEN. NEXT: G-code modal table (NXMOTION M1) + GPU pipeline-state validation (NXGFX G2) ride this shape free. Extends emit1-12 family" as *u8)
36 if ok != 1 { cr_w(1, "DUAL-WRITE FAILED\n" as *u8); sys_exit(1) }
37 cr_w(1, "CAPREG idx=" as *u8); cr_wn(1, idx); cr_w(1, " REGISTERED -- STATE_MACHINE shape 18 + TLS flight-order machine\n" as *u8)
38 sys_exit(0)
39 return 0
40}