nx_pattern_emit_netcompose.nx source

1// nx_pattern_emit_netcompose.nx -- PATTERN EMITTER: NETLIST_COMPOSE (shape 24). Authors a K-way fabric FOLD core 2// that composes the TEAM-OWNED fab_append (nx_fpga_compose, the proven net-remapping primitive) K times -- the 3// netlist-composition shape (concatenate sub-fabrics with net remapping). Like RANK_FUSE wraps nx_rrf, this wraps 4// fab_append, so the heavy lifting (the net remap) is already a green team organ; the emitter just bakes the K-fold. 5// 4th of the session's 5-emitter autonomy backlog. TEAM-AUTHORABLE hands-off (author=emitter, no Claude logic). 6// spec[0]=k (2..8 sub-fabric instances to fold) 7// Authored fn: <name>_compose(NPI, sub_npi, sub_nc, sub_init, sub_src, sub_kind, inmap, cinit, csrc, ckind) -> i64 8// appends k copies of the sub-fabric into cinit/csrc/ckind; returns the total composed cell count (k*sub_nc). 9// EMIT-TIME RAILS: k outside 2..8 -> REFUSED, nothing written. license_tier: ORIGINAL 10import "nx_syscalls.nx" 11 12func prc_w(fd: i64, s: *u8) -> i64 { var n: i64=0; while s[n]!=(0 as u8){n=n+1} sys_write(fd, s, n); return 0 } 13func prc_wn(fd: i64, v: i64) -> i64 { let bb: *u8=sys_mmap(28); var m: i64=v; if m<0{m=0-m; sys_write(fd,"-" as *u8,1)} let t: *u8=sys_mmap(28); var k: i64=0; if m==0{t[0]=48 as u8;k=1} while m>0{t[k]=(48+(m%10)) as u8;m=m/10;k=k+1} var i: i64=0; while i<k{bb[i]=t[k-1-i];i=i+1} sys_write(fd,bb,k); return 0 } 14 15func prc_spec_ok(spec: *i64) -> i64 { 16 let k: i64=spec[0] 17 if k < 2 { return 0 } 18 if k > 8 { return 0 } 19 return 1 20} 21 22func pe_nc_emit_core(fd: i64, name: *u8, spec: *i64) -> i64 { 23 let k: i64=spec[0] 24 prc_w(fd, "// AUTHORED BY THE NISHI BUILDER (pattern: NETLIST_COMPOSE) -- K-way fab_append fold over team-owned nx_fpga_compose, no Claude logic\n" as *u8) 25 prc_w(fd, "import \"nx_fpga_compose.nx\"\n" as *u8) 26 prc_w(fd, "func " as *u8); prc_w(fd, name); prc_w(fd, "_compose(NPI: i64, sub_npi: i64, sub_nc: i64, sub_init: *i64, sub_src: *i64, sub_kind: *i64, inmap: *i64, cinit: *i64, csrc: *i64, ckind: *i64) -> i64 {\n" as *u8) 27 prc_w(fd, " var cn: i64=0\n" as *u8) 28 var r: i64=0 29 while r<k { 30 prc_w(fd, " fab_append(NPI, cinit, csrc, ckind, cn, sub_npi, sub_nc, sub_init, sub_src, sub_kind, inmap); cn=cn+sub_nc\n" as *u8) 31 r=r+1 32 } 33 prc_w(fd, " return cn\n}\n" as *u8) 34 return 1 35} 36 37func pe_nc_emit_test(fd: i64, name: *u8, spec: *i64) -> i64 { 38 let k: i64=spec[0] 39 prc_w(fd, "import \"" as *u8); prc_w(fd, name); prc_w(fd, ".nx\"\nimport \"nx_syscalls.nx\"\n" as *u8) 40 prc_w(fd, "func main() -> i64 {\n" as *u8) 41 prc_w(fd, " let si: *i64=sys_mmap(64) as *i64; si[0]=8\n" as *u8) 42 prc_w(fd, " let ss: *i64=sys_mmap(64) as *i64; ss[0]=0; ss[1]=1; ss[2]=0; ss[3]=0\n" as *u8) 43 prc_w(fd, " let sk: *i64=sys_mmap(64) as *i64; sk[0]=0\n" as *u8) 44 prc_w(fd, " let im: *i64=sys_mmap(64) as *i64; im[0]=0; im[1]=1\n" as *u8) 45 prc_w(fd, " let ci: *i64=sys_mmap(512) as *i64; let cs: *i64=sys_mmap(1024) as *i64; let ck: *i64=sys_mmap(512) as *i64\n" as *u8) 46 prc_w(fd, " let cn: i64=" as *u8); prc_w(fd, name); prc_w(fd, "_compose(2, 2, 1, si, ss, sk, im, ci, cs, ck)\n" as *u8) 47 prc_w(fd, " if cn == " as *u8); prc_wn(fd, k); prc_w(fd, " { sys_exit(0) }\n sys_exit(1)\n return 1\n}\n" as *u8) 48 return 1 49} 50 51func pe_nc_author(name: *u8, modpath: *u8, testpath: *u8, spec: *i64) -> i64 { 52 if prc_spec_ok(spec) != 1 { return 0 } 53 let mf: i64=sys_openat_wr(modpath, 0x1a4); if mf < 0 { return 0 } 54 pe_nc_emit_core(mf, name, spec); sys_close(mf) 55 let tf: i64=sys_openat_wr(testpath, 0x1a4); if tf < 0 { return 0 } 56 pe_nc_emit_test(tf, name, spec); sys_close(tf) 57 return 1 58}