nx_riscv_elf.nx source

1// nx_riscv_elf.nx -- SOVEREIGN RISC-V backend RUNG 2: our own ELF64 writer. Now on the GENERAL nx_riscv_lib 2// (shared build_header, encoders, byte readers, ident, UI) -- only the program + validation tests are local. 3// T1 ELF written, size==144, magic/class(64)/data(LE). T2 e_machine=RISC-V(243), EXEC, e_flags=0(no-FPU), PT_LOAD R+X, entry. 4// T3 our reader decodes the embedded code == [addi,addi,mul,addi,addi,ecall]. (no ld/readelf/sh) 5// expect_exit: 0 Sovereign: nx_riscv_lib (+ nx_syscalls). 6import "nx_riscv_lib.nx" 7import "nx_syscalls.nx" 8 9func main() -> i64 { 10 g_puts("nx_riscv_elf (RUNG 2 ELF64 writer; now on the GENERAL nx_riscv_lib; no ld/readelf)\n" as *u8) 11 var pass: i64=0; var total: i64=0 12 let BASE: i64=0x10000; let HDR: i64=120; let ENTRY: i64=0x10078; let TOTAL: i64=144 13 14 let b: *u8=sys_mmap(256) 15 build_header(b, TOTAL, ENTRY, BASE) 16 var p: i64=HDR 17 p=put32(b,p, enc_i(0x13,0,10,0,5)) // addi a0,x0,5 18 p=put32(b,p, enc_i(0x13,0,11,0,8)) // addi a1,x0,8 19 p=put32(b,p, enc_r(0x33,0,1,12,10,11)) // mul a2,a0,a1 20 p=put32(b,p, enc_i(0x13,0,10,12,0)) // mv a0,a2 21 p=put32(b,p, enc_i(0x13,0,17,0,93)) // addi a7,x0,93 22 p=put32(b,p, 0x73) // ecall 23 g_puts(" built ELF bytes: "); g_pn(p); g_puts(" (expect 144)\n" as *u8) 24 let fd: i64=sys_openat_wr("knowledge/research/riscv_prog.elf" as *u8, 0x1ed); if fd>=0 { sys_write(fd,b,p); sys_close(fd) } 25 26 let r: *u8=sys_mmap(256) 27 let rfd: i64=sys_openat_rd("knowledge/research/riscv_prog.elf" as *u8) 28 var got: i64=0; if rfd>=0 { got=sys_read(rfd,r,256); sys_close(rfd) } 29 var t1: i64=0 30 if got==TOTAL { if r[0]==0x7F as u8 { if r[1]==69 as u8 { if r[2]==76 as u8 { if r[3]==70 as u8 { if r[4]==2 as u8 { if r[5]==1 as u8 { t1=1 } } } } } } } 31 pass=pass+ck("T1: ELF written, size==144, magic/class(64)/data(LE) (our own reader)" as *u8, t1); total=total+1 32 33 let mach: i64=rd16(r,18); let etype: i64=rd16(r,16); let flags: i64=rd32(r,48); let phnum: i64=rd16(r,56) 34 let entry: i64=rd64(r,24); let ptype: i64=rd32(r,64); let pflags: i64=rd32(r,68) 35 g_puts(" e_machine="); g_pn(mach); g_puts(" (243) e_type="); g_pn(etype); g_puts(" e_flags="); g_pn(flags); g_puts(" (0=no-FPU) entry="); g_pn(entry); g_puts("\n" as *u8) 36 var t2: i64=0 37 if mach==243 { if etype==2 { if flags==0 { if phnum==1 { if ptype==1 { if pflags==5 { if entry==ENTRY { t2=1 } } } } } } } 38 pass=pass+ck("T2: e_machine=RISC-V(243), EXEC, e_flags=0(no-FPU), one PT_LOAD R+X, entry in code -- real RISC-V binary" as *u8, t2); total=total+1 39 40 g_puts(" embedded code idents: " as *u8) 41 let exp: *i64=sys_mmap(8*8) as *i64; exp[0]=4; exp[1]=4; exp[2]=3; exp[3]=4; exp[4]=4; exp[5]=9 42 var okseq: i64=1; var i: i64=0 43 while i<6 { let w: i64=rd32(r, HDR + i*4); let id: i64=ident(w); g_pn(id); g_puts(" "); if id != exp[i] { okseq=0 } i=i+1 } 44 g_puts("(want 4 4 3 4 4 9 = addi addi mul addi addi ecall)\n" as *u8) 45 var t3: i64=0; if okseq==1 { t3=1 } 46 pass=pass+ck("T3: our reader decodes the embedded code == [addi,addi,mul,addi,addi,ecall] (no-FPU kernel, exits 5*8)" as *u8, t3); total=total+1 47 48 var okall: i64=0; if pass==total { okall=1 } 49 g_puts("---- riscv_elf: passed "); g_pn(pass); g_puts(" / "); g_pn(total); g_puts(" ----\n" as *u8) 50 if okall==1 { 51 let logf: i64=sys_openat_append("knowledge/status/riscv_elf.log" as *u8, 420) 52 if logf>=0 { let z: i64=sys_write(logf,"RISCVELF rung2 on nx_riscv_lib GREEN: own ELF writer + own reader validation (no ld/readelf)\n" as *u8,90); sys_close(logf) } 53 g_puts("verdict=GREEN (RUNG 2 on the GENERAL nx_riscv_lib: our own ELF writer emits a real rv64 executable, our own reader validates it)\n" as *u8); sys_exit(0); return 0 54 } 55 g_puts("verdict=RED\n" as *u8); sys_exit(1); return 1 56}