nx_riscv_emu.nx source

1// nx_riscv_emu.nx -- SOVEREIGN RISC-V backend, RUNG 5: execute the ELF our writer emitted. Now on the GENERAL 2// nx_riscv_lib (shared rv64im emulator `run`, ELF reader helpers, encoders) -- only the load + tests are local. 3// T1 parse e_entry == 0x10078. T2 EXECUTE riscv_prog.elf -> exit 40 (5*8) = LOOP CLOSED. 4// T3 (teeth) patch the two source immediates in memory (5->6, 8->7) -> exit 42 (6*7) = genuinely computes. 5// expect_exit: 0 Sovereign: nx_riscv_lib (+ nx_syscalls). No qemu/gcc/objdump/sh. 6import "nx_riscv_lib.nx" 7import "nx_syscalls.nx" 8 9func main() -> i64 { 10 g_puts("nx_riscv_emu (RUNG 5 execute-our-ELF; now on the GENERAL nx_riscv_lib)\n" as *u8) 11 var pass: i64=0; var total: i64=0 12 let BASE: i64=0x10000 13 14 let m: *u8=sys_mmap(0x20000) 15 let fd: i64=sys_openat_rd("knowledge/research/riscv_prog.elf" as *u8) 16 var got: i64=0; if fd>=0 { got=sys_read(fd, m, 0x20000); sys_close(fd) } 17 let entry: i64=rd64(m, 24) 18 g_puts(" loaded ELF bytes="); g_pn(got); g_puts(" e_entry(dec)="); g_pn(entry); g_puts(" (==65656=0x10078)\n" as *u8) 19 var t1: i64=0; if got==144 { if entry==0x10078 { t1=1 } } 20 pass=pass+ck("T1: our ELF reader parses e_entry == 0x10078" as *u8, t1); total=total+1 21 22 let r1: i64=run(m, entry, BASE) 23 g_puts(" EXECUTED our RISC-V ELF -> exit = "); g_pn(r1); g_puts(" (expect 40)\n" as *u8) 24 var t2: i64=0; if r1==40 { t2=1 } 25 pass=pass+ck("T2: our emulator RAN our emitted RISC-V binary -> exit==40 (5*8) -- LOOP CLOSED" as *u8, t2); total=total+1 26 27 let HDR: i64=120 28 memwr32(m, HDR+0, enc_i(0x13,0,10,0,6)) // addi a0,x0,6 29 memwr32(m, HDR+4, enc_i(0x13,0,11,0,7)) // addi a1,x0,7 30 let r2: i64=run(m, entry, BASE) 31 g_puts(" re-EXECUTED patched inputs (6,7) -> exit = "); g_pn(r2); g_puts(" (expect 42)\n" as *u8) 32 var t3: i64=0; if r2==42 { t3=1 } 33 pass=pass+ck("T3 (teeth): patched inputs -> exit==42 (6*7): genuinely computes, not hardcoded" as *u8, t3); total=total+1 34 35 var okall: i64=0; if pass==total { okall=1 } 36 g_puts("---- riscv_emu: passed "); g_pn(pass); g_puts(" / "); g_pn(total); g_puts(" ----\n" as *u8) 37 if okall==1 { 38 let logf: i64=sys_openat_append("knowledge/status/riscv_emu.log" as *u8, 420) 39 if logf>=0 { let z: i64=sys_write(logf,"RISCVEMU rung5 on nx_riscv_lib GREEN: ran our ELF exit 40, patched->42 (no qemu)\n" as *u8,78); sys_close(logf) } 40 g_puts("verdict=GREEN (RUNG 5 on the GENERAL nx_riscv_lib: wrote AND ran a RISC-V binary -> right answer; no qemu/gcc/sh)\n" as *u8); sys_exit(0); return 0 41 } 42 g_puts("verdict=RED\n" as *u8); sys_exit(1); return 1 43}