code wiki / _hdl_build / nx_rv64_run_bin.nx
`nx_rv64_run_bin.nx` source

1// nx_rv64_run_bin.nx -- generic loader: reads knowledge/hw/runbin.bin (a flat RV64 binary), runs it on the golden
2// behavioral sim (full privileged CPU + UART), and prints the UART output as "SIMUART: <hex>". Used by the real-C
3// conformance harness to run each gcc-compiled program on the sovereign emulator and diff vs QEMU. expect_exit: 0
4import "nx_syscalls.nx"
5import "nishi_hdl_primitives.nx"
6import "rv64im_min_decoder.nx"
7import "rv64im_min_alu.nx"
8import "rv64im_min_regfile.nx"
9import "rv64im_min_csr.nx"
10import "rv64im_min_clint.nx"
11import "rv64im_min_uart.nx"
12import "rv64im_min_virtio.nx"
13import "rv64im_min_mmu.nx"
14import "rv64im_min_sim.nx"
15const DMEM_MAGIC_500000000: i64 = 500000000
16
17func g_puts(s: *u8) -> i64 { var n: i64=0; while s[n]!=(0 as u8){n=n+1} sys_write(1,s,n); return 0 }
18func g_h2(v: i64) -> i64 { let b: *u8=sys_mmap(4); let n0: i64=(v>>4)&15; let n1: i64=v&15; if n0<10 { b[0]=(48+n0) as u8 } else { b[0]=(87+n0) as u8 } if n1<10 { b[1]=(48+n1) as u8 } else { b[1]=(87+n1) as u8 } sys_write(1,b,2); return 0 }
19
20const DMEM_BASE: i64 = 0x80000000
21const DMEM_SIZE: i64 = 262144   // 256KB -- room for a real program's stack + globals
22
23func main() -> i64 {
24    let lenbox: *i64=sys_mmap(16) as *i64
25    let code: *u8=sys_read_file("knowledge/hw/runbin.bin" as *u8, lenbox)
26    if (code as i64)==0 { g_puts("SIMUART: NOFILE\n" as *u8); sys_exit(1); return 1 }
27    let nb: i64=lenbox[0]
28    let rf_storage: *i64=sys_mmap(8*NX_RV64IM_RF_N_REGS) as *i64; let csr_storage: *i64=sys_mmap(8*NX_CSR_SLOT_N) as *i64
29    let clint_storage: *i64=sys_mmap(8*NX_CLINT_SLOT_N) as *i64; let uart_storage: *i64=sys_mmap(8*NX_UART_SLOT_N) as *i64
30    let mem: *u8=sys_mmap(DMEM_SIZE); let tx_buf: *u8=sys_mmap(512)
31    let rf: *NxRv64imRegfile=sys_mmap(64) as *NxRv64imRegfile; let csr: *NxRv64imCsrFile=sys_mmap(64) as *NxRv64imCsrFile
32    let clint: *NxClint=sys_mmap(64) as *NxClint; let uart: *NxUart=sys_mmap(64) as *NxUart; let sim: *NxRv64imSim=sys_mmap(128) as *NxRv64imSim
33    nx_rv64im_rf_init(rf, rf_storage); nx_rv64im_csr_init(csr, csr_storage, 0); nx_clint_init(clint, clint_storage); nx_uart_init(uart, uart_storage, tx_buf, 512)
34    nx_rv64im_sim_init(sim, rf, csr, clint, uart, DMEM_BASE, mem, DMEM_SIZE, 0)
35    var i: i64=0; while i<nb { mem[i]=code[i]; i=i+1 }
36    nx_rv64im_sim_run(sim, DMEM_MAGIC_500000000)
37    let n: i64=nx_uart_tx_count(uart)
38    g_puts("SIMUART: " as *u8); i=0; while i<n { g_h2(tx_buf[i] as i64); i=i+1 } g_puts("\n" as *u8)
39    sys_exit(0); return 0
40}
nx_rv64_run_bin.nx source

`nx_rv64_run_bin.nx` source
