code wiki / _hdl_build / nx_rv64_run_bin_fast.nx
nx_rv64_run_bin_fast.nx source
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1// nx_rv64_run_bin_fast.nx -- runs knowledge/hw/runbin.bin on the FAST INTERPRETER (fk_run, now REAL-address-based) with
2// UART capture, printing "FKUART: <hex>". Proves the rebased fast family runs REAL compiled code -- globals (auipc),
3// function pointers (jalr to absolute addresses) -- identically to the golden sim / QEMU. expect_exit: 0
4import "nx_syscalls.nx"
5import "nx_rv64_fast.nx"
6
7func g_puts(s: *u8) -> i64 { var n: i64=0; while s[n]!=(0 as u8){n=n+1} sys_write(1,s,n); return 0 }
8func g_h2(v: i64) -> i64 { let b: *u8=sys_mmap(4); let n0: i64=(v>>4)&15; let n1: i64=v&15; if n0<10 { b[0]=(48+n0) as u8 } else { b[0]=(87+n0) as u8 } if n1<10 { b[1]=(48+n1) as u8 } else { b[1]=(87+n1) as u8 } sys_write(1,b,2); return 0 }
9
10const MEMSZ: i64 = 262144 // 256KB
11
12func main() -> i64 {
13 let lenbox: *i64=sys_mmap(16) as *i64
14 let code: *u8=sys_read_file("knowledge/hw/runbin.bin" as *u8, lenbox)
15 if (code as i64)==0 { g_puts("FKUART: NOFILE\n" as *u8); sys_exit(1); return 1 }
16 let nb: i64=lenbox[0]
17 // halfword-indexed C-capable path: 2 slots/instruction max -> size arrays by nb/2 + slack.
18 let nslot: i64=nb/2 + 16
19 let opk: *i64=sys_mmap(nslot*8) as *i64; let rd: *i64=sys_mmap(nslot*8) as *i64; let rs1: *i64=sys_mmap(nslot*8) as *i64; let rs2: *i64=sys_mmap(nslot*8) as *i64; let imm: *i64=sys_mmap(nslot*8) as *i64
20 let nc: i64=fk_predecode_c(code, nb, opk, rd, rs1, rs2, imm) // C ext: variable-length, halfword-indexed
21 let reg: *i64=sys_mmap(32*8) as *i64; let mem: *u8=sys_mmap(MEMSZ); var z: i64=0; while z<32 { reg[z]=0; z=z+1 } var m: i64=0; while m<nb { mem[m]=code[m]; m=m+1 }
22 let txbuf: *u8=sys_mmap(512); fk_tx_reset(txbuf)
23 fk_run_c(opk, rd, rs1, rs2, imm, nc, reg, mem, MEMSZ, 500000000, (0 as i64) as *NxVirtioMmio)
24 let n: i64=fk_tx_count()
25 g_puts("FKUART: " as *u8); var i: i64=0; while i<n { g_h2(txbuf[i] as i64); i=i+1 } g_puts("\n" as *u8)
26 sys_exit(0); return 0
27}