code wiki / _hdl_build / nx_schematic.nx
nx_schematic.nx source
↩ module page · 33 lines · 1574 B
1// nx_schematic.nx -- LIB: schematic capture -> NETLIST, the front of the EDA flow, as a digital twin of a real
2// schematic. A schematic = pins (each pin belongs to a component and is wired to a NET, or -1 = floating). The
3// netlist is the exact connectivity that feeds place-and-route. Carries ERC (electrical rule check) with REAL
4// rules: no FLOATING pins, no SINGLE-PIN nets -- the same checks a real EDA tool flags. Hands off to
5// nx_pcb_autoroute (each routable net is a routing job). never-brick #26: pure arithmetic, bounded, deterministic.
6// license_tier: ORIGINAL
7import "nx_syscalls.nx"
8
9// count pins wired to a given net.
10func sch_net_pincount(pin_net: *i64, npins: i64, net: i64) -> i64 {
11 var cnt: i64 = 0
12 var q: i64 = 0
13 while q < npins { if pin_net[q] == net { cnt = cnt + 1 } q = q + 1 }
14 return cnt
15}
16
17// ERC: count electrical-rule violations -- a FLOATING pin (net == -1) or a net with < 2 pins (connects nothing real).
18func sch_erc(pin_net: *i64, npins: i64, nnets: i64) -> i64 {
19 var viol: i64 = 0
20 var p: i64 = 0
21 while p < npins { if pin_net[p] < 0 { viol = viol + 1 } p = p + 1 }
22 var n: i64 = 0
23 while n < nnets { if sch_net_pincount(pin_net, npins, n) < 2 { viol = viol + 1 } n = n + 1 }
24 return viol
25}
26
27// routable nets (>= 2 pins) -- the routing jobs the netlist hands to place-and-route.
28func sch_routable_nets(pin_net: *i64, npins: i64, nnets: i64) -> i64 {
29 var rn: i64 = 0
30 var n: i64 = 0
31 while n < nnets { if sch_net_pincount(pin_net, npins, n) >= 2 { rn = rn + 1 } n = n + 1 }
32 return rn
33}