nx_sharpgrade_gate.nx source

1// nx_sharpgrade_gate.nx -- GATE for the small-sharp MATH grader (6 teeth incl neg-controls + 2// determinism + a MUTATION proof that linking two families flips SPLIT->SHARP). PREREQ: stage 3// _offc/nx_sharpgrade.elf. Run from nxc2 root. One grader fork per tooth (self-exec chain). 4// T1 SHARP: main->a->b (one component) | T2 SPLIT-2: two disjoint families {aa_*},{bb_*} distinct 5// prefixes | T3 SHARP-LIB: two components but ONE prefix family (sd_*) = cohesive utilities | 6// T4 SPLIT names the component count | T5 determinism (two runs identical) | T6 MUTATION: link the 7// two families (bb_p calls aa_x) -> 1 component -> SHARP (the connectivity math genuinely discriminates). 8// license_tier: ORIGINAL No hw writes (Rule 26). 9import "nx_seat_drive_lib.nx" 10import "nx_seg_store.nx" 11import "nx_deploy_lib.nx" 12import "nx_syscalls.nx" 13 14func rg_atoi(s: *u8) -> i64 { var v: i64 = 0; var i: i64 = 0; while s[i] != (0 as u8) { let c: i64 = s[i] as i64; if c >= 48 { if c <= 57 { v = v * 10 + (c - 48) } } i = i + 1 } return v } 15func rg_itoa(dst: *u8, v: i64) -> i64 { var m: i64 = v; let t: *u8 = sys_mmap(24); var k: i64 = 0; if m == 0 { t[0] = 48 as u8; k = 1 } while m > 0 { t[k] = (48 + (m % 10)) as u8; m = m / 10; k = k + 1 } var i: i64 = 0; while i < k { dst[i] = t[k - 1 - i]; i = i + 1 } dst[k] = 0 as u8; return k } 16func rg_len(s: *u8) -> i64 { var n: i64 = 0; while s[n] != (0 as u8) { n = n + 1 } return n } 17 18func rg_run(src: *u8, outp: *u8) -> i64 { 19 let av: *i64 = sys_mmap(16) as *i64 20 av[0] = src as i64 21 return dep_run_capture("_offc/nx_sharpgrade.elf" as *u8, av, 1, outp) 22} 23 24func main(argc: i64, argv: *i64) -> i64 { 25 var stage: i64 = 1 26 var pass: i64 = 0 27 if argc >= 2 { let ss1: *u8 = argv[1] as *u8; stage = rg_atoi(ss1) } 28 if argc >= 3 { let ps: *u8 = argv[2] as *u8; pass = rg_atoi(ps) } 29 if stage < 1 { stage = 1 } 30 31 let sharp: *u8 = "func b() -> i64 { return 1 }\nfunc a() -> i64 { return b() }\nfunc main() -> i64 { return a() }\n" as *u8 32 ss_writefile("/tmp/sg_sharp.nx" as *u8, sharp, rg_len(sharp)) 33 let split: *u8 = "func aa_x() -> i64 { return 1 }\nfunc aa_y() -> i64 { return aa_x() }\nfunc bb_p() -> i64 { return 2 }\nfunc bb_q() -> i64 { return bb_p() }\n" as *u8 34 ss_writefile("/tmp/sg_split.nx" as *u8, split, rg_len(split)) 35 let lib: *u8 = "func sd_a() -> i64 { return 1 }\nfunc sd_b() -> i64 { return 2 }\n" as *u8 36 ss_writefile("/tmp/sg_lib.nx" as *u8, lib, rg_len(lib)) 37 38 if stage == 1 { 39 let rc: i64 = rg_run("/tmp/sg_sharp.nx" as *u8, "/tmp/sg_t1.out" as *u8) 40 let out: *u8 = sys_mmap(16384) 41 let n: i64 = dp_read("/tmp/sg_t1.out" as *u8, out, 16384) 42 var ok: i64 = 0 43 if rc == 0 { if sd_count(out, n, "components=1 " as *u8) == 1 { if sd_count(out, n, "verdict=SHARP\n" as *u8) == 1 { ok = 1 } } } 44 if ok == 1 { sd_w("T1 sharp-one-component PASS\n" as *u8); pass = pass + 1 } else { sd_w("T1 sharp-one-component FAIL\n" as *u8) } 45 } 46 if stage == 2 { 47 let rc: i64 = rg_run("/tmp/sg_split.nx" as *u8, "/tmp/sg_t2.out" as *u8) 48 let out: *u8 = sys_mmap(16384) 49 let n: i64 = dp_read("/tmp/sg_t2.out" as *u8, out, 16384) 50 var ok: i64 = 0 51 if rc == 0 { if sd_count(out, n, "verdict=SPLIT-2\n" as *u8) == 1 { ok = 1 } } 52 if ok == 1 { sd_w("T2 split-two-families PASS\n" as *u8); pass = pass + 1 } else { sd_w("T2 split-two-families FAIL\n" as *u8) } 53 } 54 if stage == 3 { 55 let rc: i64 = rg_run("/tmp/sg_lib.nx" as *u8, "/tmp/sg_t3.out" as *u8) 56 let out: *u8 = sys_mmap(16384) 57 let n: i64 = dp_read("/tmp/sg_t3.out" as *u8, out, 16384) 58 var ok: i64 = 0 59 if rc == 0 { if sd_count(out, n, "verdict=SHARP-LIB\n" as *u8) == 1 { ok = 1 } } 60 if ok == 1 { sd_w("T3 sharp-lib-one-prefix PASS\n" as *u8); pass = pass + 1 } else { sd_w("T3 sharp-lib-one-prefix FAIL\n" as *u8) } 61 } 62 if stage == 4 { 63 let out: *u8 = sys_mmap(16384) 64 let n: i64 = dp_read("/tmp/sg_t2.out" as *u8, out, 16384) 65 var ok: i64 = 0 66 if sd_count(out, n, "components=2 prefixes=2" as *u8) == 1 { ok = 1 } 67 if ok == 1 { sd_w("T4 split-count-named PASS\n" as *u8); pass = pass + 1 } else { sd_w("T4 split-count-named FAIL\n" as *u8) } 68 } 69 if stage == 5 { 70 let rc: i64 = rg_run("/tmp/sg_split.nx" as *u8, "/tmp/sg_t5.out" as *u8) 71 let a: *u8 = sys_mmap(16384) 72 let an: i64 = dp_read("/tmp/sg_t2.out" as *u8, a, 16384) 73 let b: *u8 = sys_mmap(16384) 74 let bn: i64 = dp_read("/tmp/sg_t5.out" as *u8, b, 16384) 75 var same: i64 = 0 76 if rc == 0 { if an == bn { if an > 0 { same = 1; var i: i64 = 0; while i < an { if a[i] != b[i] { same = 0; i = an } else { i = i + 1 } } } } } 77 if same == 1 { sd_w("T5 deterministic PASS\n" as *u8); pass = pass + 1 } else { sd_w("T5 deterministic FAIL\n" as *u8) } 78 } 79 if stage == 6 { 80 // MUTATION: link the two families -> one component -> SHARP 81 let linked: *u8 = "func aa_x() -> i64 { return 1 }\nfunc aa_y() -> i64 { return aa_x() }\nfunc bb_p() -> i64 { return aa_x() }\nfunc bb_q() -> i64 { return bb_p() }\n" as *u8 82 ss_writefile("/tmp/sg_linked.nx" as *u8, linked, rg_len(linked)) 83 let rc: i64 = rg_run("/tmp/sg_linked.nx" as *u8, "/tmp/sg_t6.out" as *u8) 84 let out: *u8 = sys_mmap(16384) 85 let n: i64 = dp_read("/tmp/sg_t6.out" as *u8, out, 16384) 86 var ok: i64 = 0 87 if rc == 0 { if sd_count(out, n, "components=1 " as *u8) == 1 { if sd_count(out, n, "verdict=SHARP\n" as *u8) == 1 { ok = 1 } } } 88 if ok == 1 { sd_w("T6 mutation-link-flips-to-sharp PASS\n" as *u8); pass = pass + 1 } else { sd_w("T6 mutation-link-flips-to-sharp FAIL\n" as *u8) } 89 } 90 91 if stage >= 6 { 92 sd_w("NX-SHARPGRADE-GATE pass=" as *u8) 93 let pb: *u8 = sys_mmap(8) 94 pb[0] = (48 + pass) as u8 95 pb[1] = 0 as u8 96 sd_w(pb) 97 if pass == 6 { sd_w("/6 verdict=GREEN\n" as *u8); sys_exit(0); return 0 } 98 sd_w("/6 verdict=RED\n" as *u8) 99 sys_exit(1) 100 return 1 101 } 102 103 let self: *u8 = argv[0] as *u8 104 let sb: *u8 = sys_mmap(24) 105 rg_itoa(sb, stage + 1) 106 let pb2: *u8 = sys_mmap(24) 107 rg_itoa(pb2, pass) 108 let nav: *i64 = sys_mmap(40) as *i64 109 nav[0] = self as i64 110 nav[1] = sb as i64 111 nav[2] = pb2 as i64 112 nav[3] = 0 113 let envp: *i64 = sys_mmap(16) as *i64 114 envp[0] = 0 115 sys_execve(self, nav, envp) 116 sd_w("SGG-EXEC-FAIL\n" as *u8) 117 sys_exit(1) 118 return 1 119}