code wiki / _hdl_build / nx_simd_census.nx
nx_simd_census.nx source
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1// nx_simd_census.nx -- SOVEREIGN vector-backend competitive census. The TEAM measures its OWN
2// SIMD/vector ISA coverage against the COMPLETE x86 vector target (knowledge/registry/
3// simd_incumbent_ref.tsv) from REAL EVIDENCE: a capability reads PRESENT iff the sovereign assembler
4// nxasm/nxasm_x86.nx actually DISPATCHES its mnemonic (the quoted "<probe>" literal appears in an
5// axc_tok_is). Non-circular, automatic, NEVER tutor-asserted -- the improvement the generic
6// re_has(self-model) census could not give the SIMD domain (it would need every mnemonic hand-added).
7//
8// Writes knowledge/registry/simd_competitive_census.tsv (status\tfeature\tunion\tevidence -- the exact
9// format nx_backlog_gen consumes via census_set.tsv) + a SIMDCENSUSGATE coverage line (total + per
10// width 128/256/512/cross). Self-validating: pos control "paddd" MUST read PRESENT, neg control
11// "zzfakeop" MUST read ABSENT, else RED (proves the detector discriminates). license_tier: ORIGINAL
12import "nx_syscalls.nx"
13import "nx_itoa_lib.nx" // shared MSB-first emitter (zero-alloc)
14const SC_MAGIC_400000: i64 = 400000
15const SC_MAGIC_80000: i64 = 80000
16const SC_MAGIC_300000: i64 = 300000
17
18const SC_REF: *u8 = "knowledge/registry/simd_incumbent_ref.tsv"
19const SC_ASM: *u8 = "nxasm/nxasm_x86.nx"
20const SC_OUT: *u8 = "knowledge/registry/simd_competitive_census.tsv"
21const SC_LOG: *u8 = "knowledge/status/simd_census.log"
22
23func sc_w(fd: i64, s: *u8) -> i64 { var n: i64 = 0; while s[n] != (0 as u8) { n = n + 1 } sys_write(fd, s, n); return 0 }
24// MIGRATED to the shared emitter (debt 1785563586). The old body mmapped a scratch buffer
25// per call and never freed it. At PAGE granularity that is 4096B leaked PER CALL -- the
26// defect that took 28.5GB of a 36GB host in nx_ts_lumadiff (2MB input, ~3.66M calls).
27// nxi_* is MSB-first, allocates NOTHING, and emits identical bytes including the sign.
28func sc_n(fd: i64, v: i64) -> i64 { nxi_fd(fd, v); return 0 }
29func sc_w2(lfd: i64, s: *u8) -> i64 { sc_w(1, s); if lfd >= 0 { sc_w(lfd, s) } return 0 }
30func sc_n2(lfd: i64, v: i64) -> i64 { sc_n(1, v); if lfd >= 0 { sc_n(lfd, v) } return 0 }
31
32func sc_read_file(path: *u8, buf: *u8, cap: i64) -> i64 {
33 let fd: i64 = sys_openat_rd(path)
34 if fd < 0 { return 0 - 1 }
35 var tot: i64 = 0
36 var r: i64 = 1
37 while r > 0 {
38 let dst: *u8 = ((buf as i64) + tot) as *u8
39 r = sys_read(fd, dst, cap - tot)
40 if r > 0 { tot = tot + r }
41 }
42 sys_close(fd)
43 return tot
44}
45
46func sc_scan_to(buf: *u8, n: i64, start: i64, delim: i64) -> i64 {
47 var i: i64 = start
48 var s: i64 = 1
49 while s == 1 { if i >= n { s = 0 } else { if buf[i] == (delim as u8) { s = 0 } else { i = i + 1 } } }
50 return i
51}
52
53func sc_app(dst: *u8, off: i64, s: *u8) -> i64 { var i: i64 = 0; while s[i] != (0 as u8) { dst[off+i] = s[i]; i = i + 1 } return off + i }
54
55// 1 iff needle (NUL-terminated) occurs as a substring in hay[0..hn].
56func sc_contains(hay: *u8, hn: i64, needle: *u8) -> i64 {
57 var nl: i64 = 0
58 while needle[nl] != (0 as u8) { nl = nl + 1 }
59 if nl == 0 { return 0 }
60 var i: i64 = 0
61 while i + nl <= hn {
62 var j: i64 = 0
63 var ok: i64 = 1
64 while j < nl {
65 if (hay[i + j] & 0xff) != (needle[j] & 0xff) { ok = 0; j = nl } else { j = j + 1 }
66 }
67 if ok == 1 { return 1 }
68 i = i + 1
69 }
70 return 0
71}
72
73// presence = the assembler dispatches `"<probe>"` (the quoted mnemonic literal).
74func sc_present(asm: *u8, an: i64, probe: *u8) -> i64 {
75 let nd: *u8 = sys_mmap(96)
76 var o: i64 = 0
77 nd[o] = 34 as u8; o = o + 1
78 var i: i64 = 0
79 while probe[i] != (0 as u8) { nd[o] = probe[i]; o = o + 1; i = i + 1 }
80 nd[o] = 34 as u8; o = o + 1
81 nd[o] = 0 as u8
82 return sc_contains(asm, an, nd)
83}
84
85func main() -> i64 {
86 let asm: *u8 = sys_mmap(SC_MAGIC_400000)
87 let an: i64 = sc_read_file(SC_ASM, asm, SC_MAGIC_400000)
88 if an <= 0 { sc_w(1, "SIMDCENSUSGATE verdict=RED reason=asm-unreadable\n" as *u8); return 1 }
89 let rb: *u8 = sys_mmap(SC_MAGIC_80000)
90 let rbn: i64 = sc_read_file(SC_REF, rb, SC_MAGIC_80000)
91 if rbn <= 0 { sc_w(1, "SIMDCENSUSGATE verdict=RED reason=ref-unreadable\n" as *u8); return 1 }
92
93 let cpos: i64 = sc_present(asm, an, "paddd" as *u8)
94 let cneg: i64 = sc_present(asm, an, "zzfakeop" as *u8)
95
96 let ob: *u8 = sys_mmap(SC_MAGIC_300000)
97 var o: i64 = 0
98 o = sc_app(ob, o, "# AUTHORED BY nx_simd_census -- PRESENT/ABSENT COMPUTED from nxasm_x86.nx evidence (assembler dispatches the mnemonic). NOT asserted.\n" as *u8)
99
100 var nf: i64 = 0; var present: i64 = 0
101 var p1: i64 = 0; var t1c: i64 = 0
102 var p2: i64 = 0; var t2c: i64 = 0
103 var p5: i64 = 0; var t5c: i64 = 0
104 var px: i64 = 0; var txc: i64 = 0
105
106 var p: i64 = 0
107 while p < rbn {
108 if rb[p] == (35 as u8) { let e: i64 = sc_scan_to(rb, rbn, p, 10); p = e + 1 }
109 else { if rb[p] == (10 as u8) { p = p + 1 }
110 else {
111 let a0: i64 = p
112 let q1: i64 = sc_scan_to(rb, rbn, a0, 9); rb[q1] = 0 as u8
113 let a1: i64 = q1 + 1
114 let q2: i64 = sc_scan_to(rb, rbn, a1, 9); rb[q2] = 0 as u8
115 let a2: i64 = q2 + 1
116 let q3: i64 = sc_scan_to(rb, rbn, a2, 10); rb[q3] = 0 as u8
117 let feat: *u8 = ((rb as i64) + a0) as *u8
118 let prob: *u8 = ((rb as i64) + a1) as *u8
119 let unin: *u8 = ((rb as i64) + a2) as *u8
120 let st: i64 = sc_present(asm, an, prob)
121 nf = nf + 1
122 let wc: i64 = feat[3] & 0xff // 'vecN-' : N in {1,2,5} or '-' for cross-cutting
123 if wc == 49 { t1c = t1c + 1; if st == 1 { p1 = p1 + 1 } }
124 if wc == 50 { t2c = t2c + 1; if st == 1 { p2 = p2 + 1 } }
125 if wc == 53 { t5c = t5c + 1; if st == 1 { p5 = p5 + 1 } }
126 if wc == 45 { txc = txc + 1; if st == 1 { px = px + 1 } }
127 if st == 1 { o = sc_app(ob, o, "PRESENT\t" as *u8); present = present + 1 } else { o = sc_app(ob, o, "ABSENT\t" as *u8) }
128 o = sc_app(ob, o, feat); o = sc_app(ob, o, "\t" as *u8); o = sc_app(ob, o, unin)
129 o = sc_app(ob, o, "\tevidence:nxasm-emits=" as *u8); o = sc_app(ob, o, prob); o = sc_app(ob, o, "\n" as *u8)
130 p = q3 + 1
131 } }
132 }
133
134 let fd: i64 = sys_openat_wr(SC_OUT, 420)
135 if fd >= 0 { sys_write(fd, ob, o); sys_close(fd) }
136
137 var cov: i64 = 0
138 if nf > 0 { cov = (present * 1000) / nf }
139 var ok: i64 = 1
140 if cpos != 1 { ok = 0 }
141 if cneg != 0 { ok = 0 }
142 if nf <= 0 { ok = 0 }
143
144 let lf: i64 = sys_openat_append(SC_LOG, 420)
145 sc_w2(lf, "SIMDCENSUS authored=organ evidence=nxasm_x86.nx total=" as *u8); sc_n2(lf, present); sc_w2(lf, "/" as *u8); sc_n2(lf, nf)
146 sc_w2(lf, " coverage_permil=" as *u8); sc_n2(lf, cov)
147 sc_w2(lf, " w128=" as *u8); sc_n2(lf, p1); sc_w2(lf, "/" as *u8); sc_n2(lf, t1c)
148 sc_w2(lf, " w256=" as *u8); sc_n2(lf, p2); sc_w2(lf, "/" as *u8); sc_n2(lf, t2c)
149 sc_w2(lf, " w512=" as *u8); sc_n2(lf, p5); sc_w2(lf, "/" as *u8); sc_n2(lf, t5c)
150 sc_w2(lf, " cross=" as *u8); sc_n2(lf, px); sc_w2(lf, "/" as *u8); sc_n2(lf, txc)
151 sc_w2(lf, " ctl_pos_paddd=" as *u8); sc_n2(lf, cpos); sc_w2(lf, " ctl_neg_fake=" as *u8); sc_n2(lf, cneg)
152 if ok == 1 { sc_w2(lf, " verdict=GREEN\n" as *u8) } else { sc_w2(lf, " verdict=RED reason=control-or-empty\n" as *u8) }
153 if lf >= 0 { sys_close(lf) }
154 if ok == 1 { return 0 }
155 return 1
156}