code wiki / _hdl_build / nx_spec_route_register.nx
`nx_spec_route_register.nx` source

1// nx_spec_route_register.nx -- records the attempt loop's SPEC build route
2// (X-Q-006 rung "rows that BUILD", row X-Q-006a).  Engineer gate = the
3// extended 18-check 6-beat scratch proof re-run GREEN at register time.
4// Registered via Librarian alloc + dual-write.  license_tier: ORIGINAL
5import "nx_cap_register.nx"
6import "nx_capreg_librarian.nx"
7import "nx_syscalls.nx"
8
9func srr_run(path: *u8) -> i64 {
10    let pid: i64 = sys_fork()
11    if pid == 0 {
12        let dn: i64 = sys_openat_wr("/dev/null" as *u8, 0x1a4)
13        if dn >= 0 { sys_dup3(dn, 1, 0); sys_dup3(dn, 2, 0) }
14        let argv: *i64 = sys_mmap(32) as *i64; argv[0] = path as i64; argv[1] = 0
15        let envp: *i64 = sys_mmap(16) as *i64; envp[0] = 0
16        sys_execve(path, argv, envp); sys_exit(127)
17    }
18    let st: *i64 = sys_mmap(16) as *i64
19    sys_wait4(pid, st, 0)
20    return st[0]
21}
22
23func main() -> i64 {
24    var allok: i64 = 1
25    if srr_run("/tmp/_attempt_loop_gate_authored.sov.elf" as *u8) != 0 { allok = 0 }
26    cr_w(1, "ENGINEER: attempt-loop 6-beat 18-check gate re-run all-pass=" as *u8); cr_wn(1, allok); cr_w(1, "\n" as *u8)
27    let eng: i64 = ig_engineer(1, 1, 1, allok)
28    let dec: i64 = ig_decision(eng, ig_council(eng, 1, 1, 2), 1)
29    if dec != IG_INGEST { cr_w(1, "HELD\n" as *u8); sys_exit(1) }
30    if cr_can_register(5, 2, 6, dec) != 1 { cr_w(1, "REFUSED\n" as *u8); sys_exit(1) }
31    let lp: *u8 = "/tmp/nishi_cap_registry.log" as *u8
32    let jp: *u8 = "knowledge/status/cap_registry_durable.log" as *u8
33    let idx: i64 = cl_next_idx(lp, jp)
34    let ok: i64 = cl_register_dual(lp, jp, idx, 5,
35        2, "SELF SPEC-BUILD-ROUTE (X-Q-006a: queue rows that BUILD) -- nx_attempt_loop route 2: a row whose gate cell carries ||SPEC=<knowledge/specs/...> is routed to the durable nx_auto_builder elf (classifier routes the shape, the EMITTER authors module+KAT, the KAT must run green sovereignly), then judged ONLY by nx_reconcile's MARK flip on the AUTOBUILD evidence row -- the team AUTHORS NEW MODULES from queue rows hands-off, zero Claude lines per capability. Trust boundary: spec paths validated (knowledge/specs/ prefix, [a-z0-9_/.-], .. rejected). Gate extended to 18/18 over 6 beats: SPEC1 row built _pe_alspec1 (WIRE_TLV shape 12) end-to-end in 62ms and reconcile flipped it DONE; BADSPEC1 (malformed) REFUSED exit-2 -> row RED loud; all rung-1 beats (raise+attempt same beat, liar kill, evidence-only DONE, IDLE) re-proven; AUTOBUILD STALE-seeding makes re-runs deterministic. wd_covered/wd_pick_covered now treat EXEC|SPEC as covered; wd_attempt generalized (elf,arg,route); wd_route_attempt shared by pick and post-raise paths. X-Q-006a closed BY reconcile on this gate's evidence. Composes nx_auto_builder (AUTOBUILD log = the evidence), staged durable _offc/nx_auto_builder.elf. Filed: X-Q-006b all-shapes dispatch, arc G rows (Gartner-class player census, player-coverage view, novel-entrant review, resource-gated autonomy, open-weights bench lane; spec 2026-06-11-market-discovery-rung-representation.md)" as *u8)
36    if ok != 1 { cr_w(1, "DUAL-WRITE FAILED\n" as *u8); sys_exit(1) }
37    cr_w(1, "CAPREG idx=" as *u8); cr_wn(1, idx); cr_w(1, " REGISTERED -- queue rows now build new modules\n" as *u8)
38    sys_exit(0)
39    return 0
40}
nx_spec_route_register.nx source

`nx_spec_route_register.nx` source
