code wiki / _hdl_build / nx_store_hist.nx

nx_store_hist.nx source

↩ module page · 139 lines · 5251 B

1// nx_store_hist.nx -- GENERIC seg-store plane column HISTOGRAM. Reads a plane FULLY (internal sts_load, 2// not subject to the 64KB tools/call RESPONSE cap that truncates a raw load -- eats seq488 for reads), 3// counts distinct values of one TAB column, sorts by count desc, and writes 'count TAB value' rows to an 4// output plane (small -> fully readable). Enables FULL-SCALE verification of large planes. SUBCLASS of 5// nx_ingest_base (ib_bput/ib_bputc/ib_bputn/ib_werr/ib_wn/ib_refuse). No hw writes (Rule 26). expect_exit: 0 6import "nx_ingest_base.nx" 7import "nx_store_seed_lib.nx" 8import "nx_syscalls.nx" 9 10const HS_CAP: i64 = 4194304 11const HS_OCAP: i64 = 65536 12const HS_MAXVALS: i64 = 512 13const HS_VALSTORE: i64 = 131072 14const HS_TAB: i64 = 9 15const HS_NL: i64 = 10 16const HS_STDERR: i64 = 2 17const HS_MAXCOL: i64 = 16 18const HS_PAIR: i64 = 2 19const HS_SPB: i64 = 256 20const HS_CANDCAP: i64 = 1024 21const HS_ARGC_MIN: i64 = 4 22const HS_EXIT_USAGE: i64 = 2 23const HS_EXIT_IO: i64 = 1 24const HS_D0: i64 = 48 25const HS_D9: i64 = 57 26 27func hs_streq(a: *u8, b: *u8) -> i64 { 28 var i: i64 = 0 29 while a[i] != (0 as u8) { if a[i] != b[i] { return 0 } i = i + 1 } 30 if b[i] != (0 as u8) { return 0 } 31 return 1 32} 33func hs_atoi(s: *u8) -> i64 { 34 var v: i64 = 0 35 var i: i64 = 0 36 while s[i] != (0 as u8) { let c: i64 = s[i] as i64; if c >= HS_D0 { if c <= HS_D9 { v = v * 10 + (c - HS_D0) } } i = i + 1 } 37 return v 38} 39func hs_cols(q: *u8, ls: i64, le: i64, sp: *i64) -> i64 { 40 var c: i64 = 0 41 var p: i64 = ls 42 while c < HS_MAXCOL { 43 var e: i64 = p 44 var s: i64 = 1 45 while s == 1 { if e >= le { s = 0 } else { if q[e] == (HS_TAB as u8) { s = 0 } else { e = e + 1 } } } 46 sp[c*HS_PAIR] = p 47 sp[c*HS_PAIR+1] = e 48 c = c + 1 49 if e >= le { return c } 50 p = e + 1 51 } 52 return c 53} 54 55func main(argc: i64, argv: *i64) -> i64 { 56 if argc < HS_ARGC_MIN { 57 ib_refuse("STORE-HIST" as *u8, "missing args <input-plane> <col-index> <output-plane>" as *u8, "seed a plan row: 1 TAB nx_store_hist TAB <in-plane> TAB <col> TAB <out-plane>" as *u8) 58 sys_exit(HS_EXIT_USAGE) 59 return HS_EXIT_USAGE 60 } 61 let inp: *u8 = argv[1] as *u8 62 let col: i64 = hs_atoi(argv[2] as *u8) 63 let outp: *u8 = argv[3] as *u8 64 let buf: *u8 = sys_mmap(HS_CAP) 65 let n: i64 = sts_load(inp, buf, HS_CAP) 66 if n <= 0 { 67 ib_refuse("STORE-HIST" as *u8, "input plane EMPTY" as *u8, "verify the input plane prefix is a full knowledge/store/ path with rows" as *u8) 68 sys_exit(HS_EXIT_IO) 69 return HS_EXIT_IO 70 } 71 let valstore: *u8 = sys_mmap(HS_VALSTORE) 72 var vso: i64 = 0 73 let valoff: *i64 = sys_mmap(HS_MAXVALS * 8) as *i64 74 let valcnt: *i64 = sys_mmap(HS_MAXVALS * 8) as *i64 75 var nvals: i64 = 0 76 var total: i64 = 0 77 let cand: *u8 = sys_mmap(HS_CANDCAP) 78 let sp: *i64 = sys_mmap(HS_SPB) as *i64 79 var i: i64 = 0 80 while i < n { 81 var le: i64 = i 82 var s: i64 = 1 83 while s == 1 { if le >= n { s = 0 } else { if buf[le] == (HS_NL as u8) { s = 0 } else { le = le + 1 } } } 84 if le > i { 85 let nc: i64 = hs_cols(buf, i, le, sp) 86 if col < nc { 87 var k: i64 = 0 88 var j: i64 = sp[col*HS_PAIR] 89 let ce: i64 = sp[col*HS_PAIR+1] 90 while j < ce { if k < HS_CANDCAP - 1 { cand[k] = buf[j]; k = k + 1 } j = j + 1 } 91 cand[k] = 0 as u8 92 var f: i64 = 0 - 1 93 var t: i64 = 0 94 while t < nvals { if hs_streq((valstore as i64 + valoff[t]) as *u8, cand) == 1 { f = t; t = nvals } else { t = t + 1 } } 95 if f >= 0 { valcnt[f] = valcnt[f] + 1 } 96 else { if nvals < HS_MAXVALS { valoff[nvals] = vso; var j2: i64 = 0; while cand[j2] != (0 as u8) { if vso < HS_VALSTORE - 2 { valstore[vso] = cand[j2]; vso = vso + 1 } j2 = j2 + 1 } valstore[vso] = 0 as u8; vso = vso + 1; valcnt[nvals] = 1; nvals = nvals + 1 } } 97 total = total + 1 98 } 99 } 100 i = le + 1 101 } 102 var a: i64 = 1 103 while a < nvals { 104 var b: i64 = a 105 while b > 0 { 106 if valcnt[b-1] < valcnt[b] { 107 let tc: i64 = valcnt[b-1]; valcnt[b-1] = valcnt[b]; valcnt[b] = tc 108 let to: i64 = valoff[b-1]; valoff[b-1] = valoff[b]; valoff[b] = to 109 b = b - 1 110 } else { b = 0 } 111 } 112 a = a + 1 113 } 114 let out: *u8 = sys_mmap(HS_OCAP) 115 var o: i64 = 0 116 var m: i64 = 0 117 while m < nvals { 118 o = ib_bputn(out, o, valcnt[m]) 119 o = ib_bputc(out, o, HS_TAB) 120 o = ib_bput(out, o, (valstore as i64 + valoff[m]) as *u8) 121 o = ib_bputc(out, o, HS_NL) 122 m = m + 1 123 } 124 let rc: i64 = sts_seed(outp, out, o) 125 if rc < 0 { 126 ib_refuse("STORE-HIST" as *u8, "output store commit failed" as *u8, "check seg-store health for the output plane; retry" as *u8) 127 sys_exit(HS_EXIT_IO) 128 return HS_EXIT_IO 129 } 130 ib_werr("STORE-HIST OK verdict=GREEN distinct=" as *u8) 131 ib_wn(HS_STDERR, nvals) 132 ib_werr(" total=" as *u8) 133 ib_wn(HS_STDERR, total) 134 ib_werr(" -> " as *u8) 135 ib_werr(outp) 136 ib_werr("\n" as *u8) 137 sys_exit(0) 138 return 0 139}