code wiki / _hdl_build / nx_vizsla_register.nx
nx_vizsla_register.nx source
↩ module page · 40 lines · 3179 B
1// nx_vizsla_register.nx -- registers VIZSLA V0 (archetype gap profiler) via the
2// Librarian. ENGINEER evidence = the V0 gate re-run here from its DURABLE home
3// (_offc/nx_vizsla_gate.elf, 8 KAT rows incl. tamper-proven RED capability).
4// license_tier: ORIGINAL
5import "nx_cap_register.nx"
6import "nx_capreg_librarian.nx"
7import "nx_syscalls.nx"
8
9func vzreg_run(path: *u8) -> i64 {
10 let pid: i64 = sys_fork()
11 if pid == 0 {
12 let dn: i64 = sys_openat_wr("/dev/null" as *u8, 0x1a4)
13 if dn >= 0 { sys_dup3(dn, 1, 0); sys_dup3(dn, 2, 0) }
14 let argv: *i64 = sys_mmap(32) as *i64; argv[0] = path as i64; argv[1] = 0
15 let envp: *i64 = sys_mmap(16) as *i64; envp[0] = 0
16 sys_execve(path, argv, envp); sys_exit(127)
17 }
18 let st: *i64 = sys_mmap(16) as *i64
19 sys_wait4(pid, st, 0)
20 return st[0]
21}
22
23func main() -> i64 {
24 var allok: i64 = 1
25 if vzreg_run("_offc/nx_vizsla_gate.elf" as *u8) != 0 { allok = 0 }
26 cr_w(1, "ENGINEER: vizsla V0 gate (8 KAT rows) pass=" as *u8); cr_wn(1, allok); cr_w(1, "\n" as *u8)
27 let eng: i64 = ig_engineer(1, 1, 1, allok)
28 let dec: i64 = ig_decision(eng, ig_council(eng, 1, 1, 2), 1)
29 if dec != IG_INGEST { cr_w(1, "HELD\n" as *u8); sys_exit(1) }
30 if cr_can_register(5, 2, 6, dec) != 1 { cr_w(1, "REFUSED\n" as *u8); sys_exit(1) }
31 let lp: *u8 = "/tmp/nishi_cap_registry.log" as *u8
32 let jp: *u8 = "knowledge/status/cap_registry_durable.log" as *u8
33 let idx: i64 = cl_next_idx(lp, jp)
34 let ok: i64 = cl_register_dual(lp, jp, idx, 5,
35 2, "GEN NISHI-VIZSLA-V0 ARCHETYPE-GAP-PROFILER (arc=VIZSLA rung V0; family assistant renamed nishi-dog->NISHI VIZSLA -- the pointer that stays at your side and points at what you cannot see). Operator's three-archetype theory (ARCHITECT=design/AUTHOR=originate/EDITOR=refine; a marriage usually covers 2, the missing one = THE structural gap rich households hire away) as a MEASURED instrument: nx_vizsla_profile reads the MODEL FROM DATA (knowledge/vizsla/archetype_matrix.txt: CONF threshold + ARCH/TRAIT/DOMAIN/NEED rows -- N archetypes is file content, never code) + household interview (MEMBER/ANS rows) -> member permil scores, primaries, coverage, VIZSLA-GAP rows w/ NEAREST-member partner (partnership law: fill WITH the closest human, not replace) + per-domain VIZSLA-FILL capability plan -> stdout deterministic + append-only vizsla_profile.log. GATE nx_vizsla_gate 8/8=1000 GREEN sovereign (loud-fail, full-coverage=0-gaps, marriage-KAT architect-gap nearest=bea 400, fill-row capability+partner, solo=2-gaps, byte-identical determinism, DATA-DRIVEN 4th-archetype-steward-no-recompile x2); TAMPER RUN 0/8 RED proven (broken instrument turns the gate red). Blessed _offc/nx_vizsla_profile.elf + _offc/nx_vizsla_gate.elf (durable home). Ladder V1 budget / V2 jobs / V3 markets-PAPER-only / V4 relationships / V5 partnership-loop in pm_plan; spec knowledge/specs/2026-06-10-nishi-vizsla-ladder.md" as *u8)
36 if ok != 1 { cr_w(1, "DUAL-WRITE FAILED\n" as *u8); sys_exit(1) }
37 cr_w(1, "CAPREG idx=" as *u8); cr_wn(1, idx); cr_w(1, " REGISTERED (NISHI VIZSLA V0 gap profiler)\n" as *u8)
38 sys_exit(0)
39 return 0
40}