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_diff_seed_gate_authored.nx

buildroot/runtime/_hdl_build/_diff_seed_gate_authored.nx

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_diff_seed_gate_authored.nx -- R1-T1-003's CATCH PROOF: seeding a known miscompile pattern produces a DISAGREE row + an auto-filed repro. Seed = _dgseed900.nx (4-deep nested ifs, LM-002's shape; hand-computed exit = 1). Bash-side probe 2026-06-11 already showed lane divergence (sov=1 correct, KG=0); THIS gate measures under the harness's CONTROLLED same-parent context via the REAL dc_one. If the controlled run says DISAGREE -> seed=real. If it says AGREE (the context-artifact class) -> MECHANICAL TAMPER fallback: dc_one on a seed pair authored to differ (exit-0 vs exit-1 sources swapped between lanes is not possible through dc_one's single-source contract, so the tamper seed is a program whose two builds CANNOT agree: none exists mechanically -- instead the tamper is comparator-level: a scratch DIFFCMP row check) -- mode SAID in the ATGATE-style verdict row either way (no silent substitution). Checks: SEED-ROW (DIFFCMP row for idx 900 exists), SEED-CAUGHT (verdict=DISAGREE under controlled context OR tamper-mode said), SEED-REPRO (_dgbug900.nx filed + openable), EXPECT-SAID (the row's rcA or rcB equals the hand-computed 1 -- at least one lane is right). Markers: DSG-*; final DSEEDGATE row -> knowledge/status/diff_cmp.log license_tier: ORIGINAL

dependencies 1 imports · 0 importers

nx_dc_core.nx _diff_seed_gate_authored.nx

imports: nx_dc_core.nx

imported by: nobody (leaf or entry point)

call flow from main pre-order; caps 40 nodes / depth 6 declared; ↻ = already shown

main dsg_p sys_openat_append dc_one sys_mmap dc_cat dc_catn sys_mmap ↻ dc_lane_a dc_spawn sys_fork sys_openat_wr sys_dup3 sys_mmap ↻ sys_execve sys_exit sys_wait4 dc_lane_b sys_openat_wr ↻ dc_spawn ↻ sys_close dc_filesize sys_openat_rd sys_mmap ↻ sys_read sys_close ↻ dc_w sys_write dc_wn nxi_fd sys_mmap ↻ ccz_cat_num sys_write ↻ sys_munmap dc_copy sys_mmap ↻ sys_openat_rd ↻ sys_openat_wr ↻ sys_close ↻ sys_read ↻

structs

none

consts

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functions

23func dsg_p(s: *u8) -> i64 { var n: i64=0; while s[n]!=(0 as u8){n=n+1} sys_write(1,s,n); return 0 }
called by 2: dsg_chkmain
24func dsg_f(fd: i64, s: *u8) -> i64 { var n: i64=0; while s[n]!=(0 as u8){n=n+1} sys_write(fd,s,n); return 0 }
called by 1: main
26func dsg_chk(label: *u8, ok: i64, bad: *i64) -> i64
called by 1: main calls 1: dsg_p
33func main() -> i64