code wiki / _hdl_build / _f64_igammaq_gate.nx
_f64_igammaq_gate.nx
buildroot/runtime/_hdl_build/_f64_igammaq_gate.nx
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_f64_igammaq_gate.nx -- ULP gate for integer-order Q(n,x) vs a sovereign 120-bit
finite-sum oracle (same closed form computed in bigfloat; bfc_exp reused from the erfc
organ). Grid n=1..12, x=k/2 (0.5..12). Plus the closed-form rail Q(1,x)==e^(-x)
(bit-exact: the n=1 kernel IS e^(-x)). RUNG bar: max ULP <= 4.
Durable: IGAMMAQ-GATE -> knowledge/status/math_engine.log.
license_tier: ORIGINAL
dependencies 6 imports · 0 importers
imports: nx_syscalls.nxnx_bigfloat120.nxnx_bigfloat120_div.nxnx_bigfloat120_erfc.nxnx_f64_exp.nx_pe_f64igammaq.nx
imported by: nobody (leaf or entry point)
call flow from main pre-order; caps 40 nodes / depth 6 declared; ↻ = already shown
structs
| none |
consts
| none |
functions
| 14 | func iq_p(s: *u8) -> i64 { var n: i64=0; while s[n]!=(0 as u8){n=n+1} sys_write(1,s,n); return 0 } |
| 15 | func iq_f(fd: i64, s: *u8) -> i64 { var n: i64=0; while s[n]!=(0 as u8){n=n+1} sys_write(fd,s,n); return 0 } |
| 16 | func iq_n(fd: i64, v: i64) -> i64 { let bb: *u8=sys_mmap(28); var m: i64=v; if m<0{m=0-m; sys_write(fd,"-" as *u8,1)}; let t: *u8=sys_mmap(28); var k: i64=0; if m==0{t[0]=48 as u8;k=1}; while m>0{t[k]=(48+(m%10)) as u8;m=m/10;k=k+1}; var i: i64=0; while i<k{bb[i]=t[k-1-i];i=i+1}; sys_write(fd,bb,k); return 0 } |
| 17 | func iq_ulp(a: i64, b: i64) -> i64 { if a >= b { return a - b } return b - a } called by 1: main |
| 20 | func iq_bf(out: *i64, n: i64, xb: *i64) -> i64 |
| 45 | func main() -> i64 |