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_k_r2_001b2a_gate.nx

buildroot/runtime/_hdl_build/_k_r2_001b2a_gate.nx

17021 B338 linesdepth 2pulls 2 transitivereach 0 importersview sourcekind gate/prooftopic k
docsdependenciesstructsconstsfunctions

about

_k_r2_001b2a_gate.nx -- the K-R2-001b2a gate (virtio-MMIO DESCRIPTOR-DMA layer; the second slice of the K-R2-001b virtqueue epic, on top of b1's queue-config). Drives the full author->handshake->queue-config->descriptor-DMA chain with NO mocks: runs the REAL nx_virtio_hs_emit (the team AUTHORS the rv64 image + the TABLE-COMPUTED golden transcript from the descriptor-DMA spec), then RUNS the image on the SOVEREIGN rv64 emulator (rv64im_min_sim + the rv64im_min_virtio device now DMA-reading the descriptor on the QueueNotify kick and exposing the read field at the QueueDescPeek RO register -- the PRIMARY, gating lane: Nishi owns the runtime) and asserts the captured serial transcript CONTAINS the emitter's golden ("VIO ACK DRV FEAT OK VQ DESC\n" -- after the queue config the driver laid ONE legacy virtio descriptor into the QueuePFN-bound guest ring page, kicked QueueNotify so the device DMA-read it, then READ QueueDescPeek BACK and verified it == the descriptor addr-low word it wrote: the descriptor-DMA binding proof) AND the sovereign emu reports a clean SiFive-finisher halt. Then the ALIGNMENT lane: qemu-system-riscv64 -machine virt -global virtio-mmio.force-legacy=true with a REAL virtio-blk-device backing. The gate authors a SECOND image from a base-rewritten spec (the blk device lands at slot 0x10008000) and runs the SAME driver against the REAL legacy virtio-blk transport: it completes the handshake + queue config, lays the SAME descriptor into qemu guest RAM at the ring page, and kicks the real QueueNotify -- the real legacy transport genuinely walks the ring. The QueueDescPeek result register is a sovereign-model instrument the real device does not expose (it reads 0), so on qemu the descriptor-DMA read-back verify gracefully drops ONLY " DESC"; the gate asserts the qemu transcript contains the b1 prefix golden ("VIO ACK DRV FEAT OK VQ") -- proving the SAME driver lays the descriptor + kicks the real device -> lanes AGREE on every register the real transport can observe. Finally a TAMPER test: corrupt the QueueDescPeek-EXPECTED constant in the sovereign image (the driver loads its own QueueDescPeek read-back into t3 via lwu and compares against this li-loaded expected in t4; bumping the expected's immediate makes t3 != t4) -> the read-back verify branches PAST stage 6 straight to the finisher -> the transcript loses ONLY its " DESC" canary (the "VIO ACK DRV FEAT OK VQ" tail survives) -> the gate MUST go RED. Evidence -> knowledge/status/virtio_blk.log (DESCGATE row; the queue row's ||MARK= reads it). Sovereign orchestration (fork/dup3/execve/wait4). license_tier: ORIGINAL

dependencies 1 imports · 0 importers

nx_syscalls.nx _k_r2_001b2a_gate.nx

imports: nx_syscalls.nx

imported by: nobody (leaf or entry point)

call flow from main pre-order; caps 40 nodes / depth 6 declared; ↻ = already shown

main g_p sys_write sys_openat_append g_run_emit sys_fork sys_openat_wr sys_dup3 sys_mmap sys_execve sys_exit sys_wait4 g_fp sys_write ↻ sys_close sys_exit ↻ sys_mmap ↻ g_read sys_openat_rd sys_read sys_close ↻ g_run_sov sys_fork ↻ sys_openat_wr ↻ sys_dup3 ↻ sys_mmap ↻ sys_execve ↻ sys_exit ↻ sys_wait4 ↻ g_buf_has g_make_backing sys_openat_wr ↻ sys_mmap ↻ sys_write ↻ sys_close ↻ g_write_qemu_spec sys_mmap ↻ g_read ↻ sys_openat_wr ↻ g_line_is

structs

none

consts

40const G_QDESCPEEK_LOAD_WORD: i64 = 0x0603ee03 // lwu t3, 0x060(t2) (QueueDescPeek read-back)

functions

42func g_p(s: *u8) -> i64 { var n: i64=0; while s[n]!=(0 as u8){n=n+1} sys_write(1,s,n); return 0 }
called by 1: main calls 1: sys_write
43func g_fp(fd: i64, s: *u8) -> i64 { var n: i64=0; while s[n]!=(0 as u8){n=n+1} sys_write(fd,s,n); return 0 }
called by 2: g_write_qemu_specmain calls 1: sys_write
44func g_fn(fd: i64, v: i64) -> i64 { let bb: *u8=sys_mmap(28); var m: i64=v; if m<0{m=0-m}; let t: *u8=sys_mmap(28); var k: i64=0; if m==0{t[0]=48;k=1}; while m>0{t[k]=(48+(m%10)) as u8;m=m/10;k=k+1}; var i: i64=0; while i<k{bb[i]=t[k-1-i];i=i+1}; sys_write(fd,bb,k); return 0 }
called by 1: main calls 2: sys_mmapsys_write
47func g_run_emit(spec: *u8) -> i64
68func g_run_sov(binpath: *u8, outpath: *u8) -> i64
89func g_run_qemu(binpath: *u8, outpath: *u8, backing: *u8) -> i64
120func g_make_backing(path: *u8) -> i64
132func g_read(path: *u8, buf: *u8, cap: i64) -> i64
143func g_buf_has(buf: *u8, n: i64, pat: *u8, pl: i64) -> i64
called by 1: main
157func g_w32(buf: *u8, o: i64) -> i64
168func g_find_descpeek_load(buf: *u8, n: i64) -> i64
called by 1: main calls 1: g_w32
177func g_strlen(s: *u8) -> i64 { var n: i64 = 0; while s[n] != (0 as u8) { n = n + 1 } return n }
called by 1: main
180func g_line_is(buf: *u8, ls: i64, le: i64, key: *u8) -> i64
called by 1: g_write_qemu_spec
193func g_write_qemu_spec(mainspec: *u8, derived: *u8, qemu_out: *u8) -> i64
220func main() -> i64