code wiki / _hdl_build / nx_cmos.nx
nx_cmos.nx
buildroot/runtime/_hdl_build/nx_cmos.nx
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nx_cmos.nx -- SEE + safely TWEAK CMOS, never-brick (operator 2026-06-16: "see what our cmos is
while we are in the os ... and tweak ... ramifications of os-managed cmos").
module: nishi-core.genealogy.cmos
capability: CORE_COMPUTE (observe the live RTC/CMOS + a never-brick config-tweak model)
TWO HALVES of PC CMOS:
(1) the RTC/clock + status regs [0x00..0x0F] -- we READ this LIVE from /proc/driver/rtc
(read-only, no root) so you can SEE the machine's real clock right now.
(2) the config RAM [0x10..0x7F] -- BIOS settings, protected by the classic AT
CHECKSUM (16-bit sum of bytes 0x10..0x2D, stored big-endian at 0x2E/0x2F). A bad checksum
makes the BIOS report "CMOS checksum error" and load DEFAULTS = a recoverable SOFT-brick.
RAMIFICATIONS (why os-managed CMOS is a never-brick boundary):
* READS are safe. WRITES are the brick risk. The CMOS checksum means a corrupt/partial write
degrades to defaults (recoverable), NOT a hard brick -- so cmos_set_safe ALWAYS recomputes the
checksum (BIOS-acceptable) AND keeps a golden snapshot to restore. It RANGE-GUARDS: never the
RTC/status bytes, never the checksum bytes.
* The DANGEROUS cousins are UEFI variables + SPI flash (those CAN hard-brick: e.g. deleting
efivars bricked some laptops). Those go through the A/B + immutable-factory + signed-capsule
path (nx_fw_robust_flash / the ed25519 capsule), tested in nx_emu_uefi BEFORE real hardware.
Sandboxed/in-memory: this organ NEVER writes the real NVRAM device node or ports here -- the safe model is
proven first; wiring to the real device is an explicit, operator-gated step. Sovereign. license_tier: ORIGINAL
dependencies 2 imports · 2 importers
imports: nx_syscalls.nxnx_itoa_lib.nx
imported by: nx_cmos_gate.nxnx_cmos_signed.nx
call flow from main pre-order; caps 40 nodes / depth 6 declared; ↻ = already shown
structs
| none |
consts
| 26 | const CMOS_MAGIC_8208: i64 = 8208 |
| 27 | const CMOS_MAGIC_8192: i64 = 8192 |
| 29 | const CMOS_SIZE: i64 = 128 |
| 30 | const CMOS_CK_START: i64 = 16 // 0x10: first checksummed config byte |
| 31 | const CMOS_CK_END: i64 = 46 // 0x2E: exclusive -> sums 0x10..0x2D |
| 32 | const CMOS_CK_HI: i64 = 46 // 0x2E: checksum high byte |
| 33 | const CMOS_CK_LO: i64 = 47 // 0x2F: checksum low byte |
| 34 | const CMOS_CFG_END: i64 = 46 // safe-tweak range = [0x10, 0x2E): the checksummed config only |
| 36 | const CMOS_OK: i64 = 0 |
| 37 | const CMOS_REFUSED: i64 = 1 // offset out of the safe config range (RTC/status/checksum byte) |
| 38 | const CMOS_RESTORED: i64 = 2 // post-write invalid (shouldn't happen) -> restored from golden |
functions
| 40 | func c_puts(s: *u8) -> i64 { var n: i64 = 0; while s[n] != 0 as u8 { n = n + 1 } sys_write(1, s, n); return 0 } |
| 45 | func c_putn(v: i64) -> i64 { nxi_out(v); return 0 } |
| 46 | func c_read(path: *u8, lb: *i64) -> *u8 |
| 61 | func cmos_cksum(img: *u8) -> i64 |
| 66 | func cmos_stored(img: *u8) -> i64 { return (img[CMOS_CK_HI] as i64) * 256 + (img[CMOS_CK_LO] as i64) } |
| 67 | func cmos_fix(img: *u8) -> i64 |
| 73 | func cmos_valid(img: *u8) -> i64 { if cmos_cksum(img) == cmos_stored(img) { return 1 } return 0 } |
| 74 | func cmos_restore(dst: *u8, src: *u8) -> i64 { var i: i64 = 0; while i < CMOS_SIZE { dst[i] = src[i]; i = i + 1 } return 0 } |
| 78 | func cmos_golden(img: *u8) -> i64 |
| 87 | func cmos_set_safe(img: *u8, off: i64, val: i64) -> i64 |
| 97 | func cmos_corrupt_raw(img: *u8, off: i64) -> i64 { img[off] = ((img[off] as i64) + 1) as u8; return 0 } |
| 99 | func cmos_show_rtc() -> i64 |
| 108 | func main() -> i64 |