nx_emu_loongarch64.nx

nx_emu_loongarch64.nx -- sovereign LoongArch64 (LA64) interpreter (NX-EMU). Flat 32 GPRs (r0==zero), little-endian, NO register windows, NO delay slots. Decode/execute pure NishiLang per the LoongArch Reference Manual Volume 1 (v1.10) -- NO qemu (qemu-loongarch64 stays a differential BENCHMARK that must agree, never a dependency). How Nishi CARRIES loongarch64 execution (operator: nishi carries; externals = bench). --------------------------------------------------------------------- 2026-09-03, ISA LANE. WHAT THIS GENERATION ADDS AND WHY. The previous generation decoded ELEVEN 3R ops, THREE 2RI12 ops, jirl, bl and syscall -- and NOT ONE CONDITIONAL BRANCH. An interpreter with no conditional branch cannot run a loop, cannot run an if, and cannot run any program a compiler would emit; it could only ever execute straight-line arithmetic. That is the same gap the mips64 sibling carried until 2026-09-03, named by nx_isa_conform_gate and closed the same day, and it is the highest-value thing missing here. ADDED (each encoding taken from the manual instruction tables, not from any emulator behaviour): branches beq bne blt bge bltu bgeu (2RI16) | beqz bnez (1RI21) | b (I26) compare slt sltu slti sltui logic nor andn orn andi ori xori maskeqz masknez shift-imm slli.w slli.d srli.w srli.d srai.w srai.d 32-bit add.w sub.w mul.w sll.w srl.w sra.w addi.w const lu12i.w lu32i.d pcaddi pcaddu12i pcalau12i memory ld.b ld.h ld.w st.b st.h st.w ld.bu ld.hu ld.wu FIXED, a real defect the ruler caught: SRL.D was implemented with the NishiLang >> operator which is ARITHMETIC, so srl.d and sra.d were the SAME instruction. It is invisible on every non-negative value -- the exact shape of a test that cannot fail -- and shows up only on a negative operand shifted far enough that the sign copies reach the low byte. Logical right shift now goes through la_srl, mirroring the rv64 sibling emu_srl, which carries the same comment for the same reason. ALSO FIXED: (1) memory accesses are BOUNDS-CHECKED against mem_size instead of trusting the guest -- an out-of-range guest address used