nx_emu_s390x.nx

nx_emu_s390x.nx -- sovereign IBM Z (s390x) interpreter (NX-EMU). 64-bit big-endian, 16 GPRs, VARIABLE-LENGTH instructions (length from the top 2 bits of byte0: 00->2, 01/10->4, 11->6). z/Architecture is the only variable length ISA on the estate board, so the fetch width is decoded, never assumed. Linux s390x: svc <imm> = syscall number, args r2.., exit = 1 (code in r2). NO qemu. license_tier: ORIGINAL DECODED TODAY, by family: RR 07 BCR (all 16 masks, and R2=0 is the architected no-operation) RR 0A SVC (1 = exit; every other number is an honest UNSUPPORTED) RI A7 x4 BRC x5 BRAS x6 BRCT x7 BRCTG x8 LHI x9 LGHI xA AHI xB AGHI xD MGHI xE CHI xF CGHI RRE B9 04 LGR 08 AGR 09 SGR 0C MSGR 20 CGR 21 CLGR 80 NGR 81 OGR 82 XGR RX 41 LA RXY E3 04 LG 08 AG 09 SG 24 STG RSY EB 04 LMG 0A SRAG 0C SRLG 0D SLLG 24 STMG RIL C0 x0 LARL x1 LGFI x4 BRCL x5 BRASL SEVEN DEFECTS THIS GENERATION FIXES, each found by reading the z/Architecture Principles of Operation extended-opcode tables rather than the source: 1. AGHI WAS DECODED AT THE WRONG EXTENDED OPCODE. The RI table is A7x8 LHI, A7x9 LGHI, A7xA AHI, A7xB AGHI. The previous generation implemented A7xA as a 64-bit add labelled aghi and had NO A7xB case, so a real AGHI executed as a SILENT NO-OP and a real AHI executed with the wrong width. Both are wrong-answer generators that still run to exit. 2. AN UNKNOWN EXTENDED OPCODE SILENTLY DID NOTHING. handled was set for the whole A7 / B9 / E3 / EB / C0 family before the sub-opcode was examined, so every unimplemented member of those families no-opped and the program ran on with wrong data. That converts UNSUPPORTED into WRONG-ANSWER, which is the one collapse an ISA ruler exists to refuse: a missing instruction and a miscomputed one need OPPOSITE fixes. Each family now carries a subok flag (one per family). 3. THERE WAS NO CONDITION CODE AND NO CONDITIONAL BRANCH AT ALL, so no loop and no if could run. BCR honoured only mask 15. Added: a cc register set by the arithmetic, compare and logic classes, plus BRC, BRCL, BRCT, BRCTG and the full 16-way BCR mask. 4. BASE REGISTER 0 WAS TREATED AS A REAL REGISTER. PoP: a zero in the B or X field means THE ABSENCE OF A BASE, not the contents of general register 0. The old code honoured that for X and not for B, so any program that keeps a live value in r0 addressed the wrong storage.