nx_hw_simd_caps.nx

nx_hw_simd_caps.nx -- runtime SIMD capability detection. Reads /proc/cpuinfo and looks for vendor-specific flag tokens. Sovereign: pure NishiLang, no libc, no /sys probe utilities, no CPUID inline-asm dep. Works on every Linux arch the substrate targets (x86_64, RV64, AArch64, etc.) -- /proc/cpuinfo is the kernel's canonical CPU-feature reporting surface. HISTORICAL NOTE: this module was the smoke that surfaced the gp-relative relaxation bug fixed 2026-05-16. When 6 statics fall within a single 4 KiB BSS window, the assembler optimizes auipc+addi global-address sequences into addi(gp)+addi, but our minimal crt0 doesn't initialize gp, so reads/writes dereferenced garbage. Fixed in riscv.c by always emitting `.option norelax` -- the bug class is now structurally impossible regardless of static count. See docs/NISHILANG_CONCURRENCY.md "Pitfalls" section for the diagnosis trail. Why probe at runtime instead of compile-time: - One binary can dispatch scalar / AVX2 / AVX-512 paths based on the actual chip it runs on (vs N separate builds) - Honest cardinal: refuse silent CPU-feature assumptions; ask the kernel what it actually has Use: if nx_hw_has_avx512() == 1 { use_avx512_path() } else if nx_hw_has_avx2() == 1 { use_avx2_path() } else { use_scalar_path() } Cost: ~4 KiB stack buffer + one sys_openat + one sys_read + linear scan. Acceptable to call once at startup; cache in a static for repeated checks. Caches: once probed, results are stored in static i64 slots so subsequent calls are zero-syscall.